Gehäuseinformationen
| Gehäuse | Pins TSSOP (PW) | 16 |
| Betriebstemperaturbereich (°C) -40 to 85 |
| Gehäusemenge | Träger 2.000 | LARGE T&R |
Merkmale von PCA9557
- Low Standby Current Consumption of 1 μA Max
- I2C to Parallel Port Expander
- Operating Power-Supply Voltage Range of 2.3 V to 5.5 V
- 5-V Tolerant I/O Ports
- 400-kHz Fast I2C Bus
- Three Hardware Address Pins Allow for Use of up to Eight Devices on I2C/SMBus
- Lower-Voltage Higher-Performance Migration Path for PCA9556
- Input/Output Configuration Register
- Polarity Inversion Register
- Active-Low Reset Input
- Internal Power-On Reset
- High-Impedance Open Drain on P0
- Power Up With All Channels Configured as Inputs
- No Glitch on Power Up
- Noise Filter on SCL/SDA Inputs
- Latched Outputs With High Current Drive Maximum Capability for Directly Driving LEDs
- Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II
- ESD Protection Exceeds JESD 22
- 2000-V Human-Body Model (A114-A)
- 200-V Machine Model (A115-A)
- 1000-V Charged-Device Model (C101)
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Beschreibung von PCA9557
This 8-bit I/O expander for the two-line bidirectional bus (I2C) is designed for 2.3-V to 5.5-V VCC operation. The device provides general-purpose remote I/O expansion for most microcontroller families via the I2C interface [serial clock (SCL) and serial data (SDA)].
The PCA9557 consists of one 8-bit configuration (input or output selection), input port, output port, and polarity inversion (active-high) registers. At power on, the I/Os are configured as inputs. However, the system master can enable the I/Os as either inputs or outputs by writing to the I/O configuration bits. The data for each input or output is kept in the corresponding input or output register. The polarity of the input port register can be inverted with the polarity inversion register. All registers can be read by the system master.
The device outputs (latched) have high-current drive capability for directly driving LEDs. The device has low current consumption.
The system master can reset the PCA9557 in the event of a timeout or other improper operation by asserting a low in the active-low reset (RESET) input. The power-on reset puts the registers in their default state and initializes the I2C/SMBus state machine. Asserting RESET causes the same reset/initialization to occur without depowering the part.
Three hardware pins (A0, A1, and A2) are used to program and vary the fixed I2C address, allowing up to eight devices to share the same I2C bus or SMBus.