Produktdetails

Technology family AC Supply voltage (min) (V) 2 Supply voltage (max) (V) 6 Number of channels 6 IOL (max) (mA) 24 IOH (max) (mA) -24 Supply current (max) (µA) 80 Input type Schmitt-Trigger Output type Push-Pull Features Balanced outputs, Very high speed (tpd 5-10ns) Rating Space Operating temperature range (°C) -55 to 125
Technology family AC Supply voltage (min) (V) 2 Supply voltage (max) (V) 6 Number of channels 6 IOL (max) (mA) 24 IOH (max) (mA) -24 Supply current (max) (µA) 80 Input type Schmitt-Trigger Output type Push-Pull Features Balanced outputs, Very high speed (tpd 5-10ns) Rating Space Operating temperature range (°C) -55 to 125
CDIP (J) 14 130.4652 mm² 19.56 x 6.67 CFP (W) 14 58.023 mm² 9.21 x 6.3
  • 2-V to 6-V VCC Operation
  • Inputs Accept Voltages to 6 V
  • Max tpd of 9.5 ns at 5 V
  • Rad-Tolerant: 50 kRad(Si) TID(1)
    • TID Dose Rate < 2mRad/sec
  • QML-V Qualified, SMD 5962-87624

(1) Radiation tolerance is a typical value based upon initial device qualification. Radiation Lot Acceptance Testing is available - contact factory for details.

  • 2-V to 6-V VCC Operation
  • Inputs Accept Voltages to 6 V
  • Max tpd of 9.5 ns at 5 V
  • Rad-Tolerant: 50 kRad(Si) TID(1)
    • TID Dose Rate < 2mRad/sec
  • QML-V Qualified, SMD 5962-87624

(1) Radiation tolerance is a typical value based upon initial device qualification. Radiation Lot Acceptance Testing is available - contact factory for details.

These Schmitt-trigger devices contain six independent inverters. They perform the Boolean function Y = A. Because of the Schmitt action, they have different input threshold levels for positive-going (VT+) and for negative-going (VT–) signals.

These circuits are temperature compensated and can be triggered from the slowest of input ramps and still give clean, jitter-free output signals. They also have a greater noise margin than conventional inverters.

These Schmitt-trigger devices contain six independent inverters. They perform the Boolean function Y = A. Because of the Schmitt action, they have different input threshold levels for positive-going (VT+) and for negative-going (VT–) signals.

These circuits are temperature compensated and can be triggered from the slowest of input ramps and still give clean, jitter-free output signals. They also have a greater noise margin than conventional inverters.

Herunterladen Video mit Transkript ansehen Video

Technische Dokumentation

star =Von TI ausgewählte Top-Empfehlungen für dieses Produkt
Keine Ergebnisse gefunden. Bitte geben Sie einen anderen Begriff ein und versuchen Sie es erneut.
Alle anzeigen 19
Typ Titel Datum
* Data sheet Rad-Tolerant Class V, Hex Schmitt-Trigger Inverter datasheet (Rev. B) 07 Mär 2012
* SMD SN54AC14-SP SMD 5962-87624 08 Jul 2016
* Radiation & reliability report SN54AC14-SP - 50 krad(Si) Total Ionizing Dose (TID) Characterization Report 26 Mär 2015
More literature TI Engineering Evaluation Units vs. MIL-PRF-38535 QML Class V Processing (Rev. A) 31 Aug 2023
Application note Heavy Ion Orbital Environment Single-Event Effects Estimations (Rev. A) PDF | HTML 17 Nov 2022
Application note Single-Event Effects Confidence Interval Calculations (Rev. A) PDF | HTML 19 Okt 2022
Selection guide TI Space Products (Rev. I) 03 Mär 2022
Application note Implications of Slow or Floating CMOS Inputs (Rev. E) 26 Jul 2021
Selection guide Logic Guide (Rev. AB) 12 Jun 2017
Application note Understanding and Interpreting Standard-Logic Data Sheets (Rev. C) 02 Dez 2015
More literature HiRel Unitrode Power Management Brochure 07 Jul 2009
User guide LOGIC Pocket Data Book (Rev. B) 16 Jan 2007
Application note Semiconductor Packing Material Electrostatic Discharge (ESD) Protection 08 Jul 2004
Application note TI IBIS File Creation, Validation, and Distribution Processes 29 Aug 2002
Application note CMOS Power Consumption and CPD Calculation (Rev. B) 01 Jun 1997
Application note Designing With Logic (Rev. C) 01 Jun 1997
Application note Input and Output Characteristics of Digital Integrated Circuits 01 Okt 1996
Application note Live Insertion 01 Okt 1996
Application note Using High Speed CMOS and Advanced CMOS in Systems With Multiple Vcc 01 Apr 1996

Design und Entwicklung

Weitere Bedingungen oder erforderliche Ressourcen enthält gegebenenfalls die Detailseite, die Sie durch Klicken auf einen der unten stehenden Titel erreichen.

Gehäuse Pins Herunterladen
CDIP (J) 14 Optionen anzeigen
CFP (W) 14 Optionen anzeigen

Bestellen & Qualität

Beinhaltete Information:
  • RoHS
  • REACH
  • Bausteinkennzeichnung
  • Blei-Finish/Ball-Material
  • MSL-Rating / Spitzenrückfluss
  • MTBF-/FIT-Schätzungen
  • Materialinhalt
  • Qualifikationszusammenfassung
  • Kontinuierliches Zuverlässigkeitsmonitoring
Beinhaltete Information:
  • Werksstandort
  • Montagestandort

Support und Schulungen

TI E2E™-Foren mit technischem Support von TI-Ingenieuren

Inhalte werden ohne Gewähr von TI und der Community bereitgestellt. Sie stellen keine Spezifikationen von TI dar. Siehe Nutzungsbedingungen.

Bei Fragen zu den Themen Qualität, Gehäuse oder Bestellung von TI-Produkten siehe TI-Support. ​​​​​​​​​​​​​​

Videos