Gehäuseinformationen
| Gehäuse | Pins PDIP (P) | 8 |
| Betriebstemperaturbereich (°C) -40 to 85 |
| Gehäusemenge | Träger 50 | TUBE |
Merkmale von SN65HVD08
- Operates with a 3-V to 5.5-V supply
- Consumes less than 90-mW Quiescent power
- Open-circuit, short-circuit, and idle-bus failsafe receiver
- 1/8th Unit-load (up to 256 nodes on the bus)
- Bus-pin ESD protection exceeds 16-kV HBM
- Driver output voltage slew-rate limited for optimum signal quality at 10 Mbps
- Electrically compatible with ANSI TIA/EIA-485 standard
Beschreibung von SN65HVD08
The SN65HVD08 combines a 3-state differential line driver and differential line receiver designed for balanced data transmission and interoperation with ANSI TIA/EIA-485-A and ISO-8482E standard-compliant devices.
The wide supply voltage range and low quiescent current requirements allow the SN65HVD08s to operate from a 5-V power bus in the cable with as much as a 2-V line voltage drop. Busing power in the cable can alleviate the need for isolated power to be generated at each connection of a ground-isolated bus.
The driver differential outputs and receiver differential inputs connect internally to form a differential input/output (I/O) bus port that is designed to offer minimum loading to the bus whenever the driver is disabled or not powered. The drivers and receivers have active-high and active-low enables respectively, which can be externally connected together to function as a direction control.