Gehäuseinformationen
| Gehäuse | Pins SOIC (D) | 8 |
| Betriebstemperaturbereich (°C) -40 to 85 |
| Gehäusemenge | Träger 2.500 | LARGE T&R |
Merkmale von SN65HVD12
- Operates with a 3.3-V supply
- Bus-pin ESD protection exceeds 16-kV HBM
- 1/8 Unit-load option available (up to 256 nodes on the bus)
- Optional driver output transition times for signaling rates (1)of 1 Mbps, 10 Mbps, and 32 Mbps
- Meets or exceeds the requirements of ANSI TIA/EIA-485-A
- Bus-pin short-circuit protection from –7 V to 12 V
- Low-current standby mode: 1 µA, typical
- Open-circuit, idle-bus, and shorted-bus fail-safe receiver
- Thermal shutdown protection
- Glitch-free power-up and power-down protection for hot-plugging applications
- SN75176 footprint
(1)The signaling rate of a line is the number of voltage transitions that are made per second expressed in the units bps (bits per second).
Beschreibung von SN65HVD12
The SN65HVD10, SN75HVD10, SN65HVD11, SN75HVD11, SN65HVD12, and SN75HVD12 bus transceivers all combine a 3-state differential line driver, as well as a differential input line receiver that operates with a single 3.3-V power supply. They are designed for balanced transmission lines and meet or exceed ANSI standard TIA/EIA-485-A and ISO 8482:1993. These differential bus transceivers are monolithic integrated circuits, designed for bidirectional data communication on multipoint bus-transmission lines. The drivers and receivers have active-high and active-low enables, that can be externally connected together to function as direction control. Very low device standby supply current, can be achieved by disabling the driver and the receiver.
The driver differential outputs and receiver differential inputs connect internally to form a differential input/output (I/O) bus port, that is designed to offer minimum loading to the bus whenever the driver is disabled or VCC = 0. These parts feature wide positive and negative common-mode voltage ranges, making them suitable for party-line applications.