Startseite Schnittstelle LVDS-, M-LVDS- und PECL-ICs

SN65MLVD200A

AKTIV

Halbduplex-M-LVDS-Transceiver

Produktdetails

Function Transceiver Protocols M-LVDS Number of transmitters 1 Number of receivers 1 Supply voltage (V) 3.3 Signaling rate (Mbps) 100 Input signal LVTTL, M-LVDS Output signal LVTTL, M-LVDS Rating Catalog Operating temperature range (°C) -40 to 85
Function Transceiver Protocols M-LVDS Number of transmitters 1 Number of receivers 1 Supply voltage (V) 3.3 Signaling rate (Mbps) 100 Input signal LVTTL, M-LVDS Output signal LVTTL, M-LVDS Rating Catalog Operating temperature range (°C) -40 to 85
SOIC (D) 8 29.4 mm² 4.9 x 6
  • Low-Voltage Differential 30Ω to 55Ω Line Drivers and Receivers for Signaling Rates (1) up to 100Mbps, Clock Frequencies up to 50MHz
  • Type-1 Receivers Incorporate 25mV of Hysteresis (SN65MLVD200A, SN65MLVD202A)
  • Type-2 Receivers Provide an Offset (100mV) Threshold to Detect Open-Circuit and Idle-Bus Conditions (SN65MLVD204A, SN65MLVD205A)
  • Meets or Exceeds the M-LVDS Standard TIA/EIA-899 for Multipoint Data Interchange
  • Controlled Driver Output Voltage Transition Times for Improved Signal Quality
  • –1V to 3.4V of Common-Mode Voltage Range Allows Data Transfer With 2V of Ground Noise
  • Bus Pins High Impedance When Disabled or VCC ≤ 1.5V
  • 200Mbps Devices Available (SN65MLVD201, SN65MLVD203, SN65MLVD206, SN65MLVD207)
  • Bus Pin ESD Protection Exceeds 8kV
  • Packages Available:
    • 8-Pin SOIC SN65MLVD200A, SN65MLVD204A
    • 14-Pin SOIC SN65MLVD202A, SN65MLVD205A
  • Improved Alternatives to the SN65MLVD200, SN65MLVD202A, SN65MLVD204A, and SN65MLVD205A Devices

(1)The signaling rate of a line, is the number of voltage transitions that are made per second expressed in the units bps (bits per second)

  • Low-Voltage Differential 30Ω to 55Ω Line Drivers and Receivers for Signaling Rates (1) up to 100Mbps, Clock Frequencies up to 50MHz
  • Type-1 Receivers Incorporate 25mV of Hysteresis (SN65MLVD200A, SN65MLVD202A)
  • Type-2 Receivers Provide an Offset (100mV) Threshold to Detect Open-Circuit and Idle-Bus Conditions (SN65MLVD204A, SN65MLVD205A)
  • Meets or Exceeds the M-LVDS Standard TIA/EIA-899 for Multipoint Data Interchange
  • Controlled Driver Output Voltage Transition Times for Improved Signal Quality
  • –1V to 3.4V of Common-Mode Voltage Range Allows Data Transfer With 2V of Ground Noise
  • Bus Pins High Impedance When Disabled or VCC ≤ 1.5V
  • 200Mbps Devices Available (SN65MLVD201, SN65MLVD203, SN65MLVD206, SN65MLVD207)
  • Bus Pin ESD Protection Exceeds 8kV
  • Packages Available:
    • 8-Pin SOIC SN65MLVD200A, SN65MLVD204A
    • 14-Pin SOIC SN65MLVD202A, SN65MLVD205A
  • Improved Alternatives to the SN65MLVD200, SN65MLVD202A, SN65MLVD204A, and SN65MLVD205A Devices

(1)The signaling rate of a line, is the number of voltage transitions that are made per second expressed in the units bps (bits per second)

The SN65MLVD20xx devices are multipoint low-voltage differential (M-LVDS) line drivers and receivers that are optimized to operate at signaling rates up to 100 Mbps. All parts comply with the multipoint low-voltage differential signaling (M-LVDS) standard TIA/EIA-899.

The SN65MLVD20xx devices have enhancements over their predecessors. Improved features include controlled slew rate on the driver output to help minimize reflections from unterminated stubs, which results in better signal integrity. Additionally, 8-kV ESD protection on the bus pins for more robustness. The same footprint definition was maintained making for an easy drop-in replacement for a system performance upgrade.

The devices are characterized for operation from –40°C to 85°C.

The SN65MLVD20xx devices are multipoint low-voltage differential (M-LVDS) line drivers and receivers that are optimized to operate at signaling rates up to 100 Mbps. All parts comply with the multipoint low-voltage differential signaling (M-LVDS) standard TIA/EIA-899.

The SN65MLVD20xx devices have enhancements over their predecessors. Improved features include controlled slew rate on the driver output to help minimize reflections from unterminated stubs, which results in better signal integrity. Additionally, 8-kV ESD protection on the bus pins for more robustness. The same footprint definition was maintained making for an easy drop-in replacement for a system performance upgrade.

The devices are characterized for operation from –40°C to 85°C.

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Technische Dokumentation

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Typ Titel Datum
* Data sheet SN65MLVD20xx Multipoint-LVDS Line Driver and Receiver datasheet (Rev. E) PDF | HTML 01 Mär 2024
Application note An Introduction to M-LVDS and Clock and Data Distribution Applications (Rev. C) PDF | HTML 22 Jun 2023
Application brief How Far, How Fast Can You Operate MLVDS? 06 Aug 2018
Application note SPI-Based Data Acquisition/Monitor Using the TLC2551 Serial ADC (Rev. A) 20 Nov 2001

Design und Entwicklung

Weitere Bedingungen oder erforderliche Ressourcen enthält gegebenenfalls die Detailseite, die Sie durch Klicken auf einen der unten stehenden Titel erreichen.

Evaluierungsplatine

MLVD20XBEVM — Evaluierungsmodul SN65MLVD203B und SN65MLVD204B für Vollduplex- und Halbduplex-Multipoint-LVDS (M

Benutzerhandbuch: PDF
Evaluierungsplatine

MLVD20XEVM — M-LVDS-Evaluierungsmodul

This evaluation module is for the SN65MLVD203B and SN65MLVD204B, which are M-LVDS transceivers.
The SN65MLVD203B is a full-duplex transceiver, and the SN65MLVD204B is a half-duplex transceiver.
Benutzerhandbuch: PDF
Simulationsmodell

SN65MLVD200A IBIS Model

SLLC184.ZIP (16 KB) - IBIS Model
Simulationstool

PSPICE-FOR-TI — PSpice® für TI Design-und Simulationstool

PSpice® für TI ist eine Design- und Simulationsumgebung, welche Sie dabei unterstützt, die Funktionalität analoger Schaltungen zu evaluieren. Diese voll ausgestattete Design- und Simulationssuite verwendet eine analoge Analyse-Engine von Cadence®. PSpice für TI ist kostenlos erhältlich und (...)
Simulationstool

TINA-TI — SPICE-basiertes analoges Simulationsprogramm

TINA-TI provides all the conventional DC, transient and frequency domain analysis of SPICE and much more. TINA has extensive post-processing capability that allows you to format results the way you want them. Virtual instruments allow you to select input waveforms and probe circuit nodes voltages (...)
Benutzerhandbuch: PDF
Gehäuse Pins CAD-Symbole, Footprints und 3D-Modelle
SOIC (D) 8 Ultra Librarian

Bestellen & Qualität

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  • Materialinhalt
  • Qualifikationszusammenfassung
  • Kontinuierliches Zuverlässigkeitsmonitoring
Beinhaltete Information:
  • Werksstandort
  • Montagestandort

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