SN74AXC8T245-Q1

AKTIV

Bus-Transceiver für die Automobilindustrie, 8 Bit, Doppelversorgung, mit konfigurierbarer Spannungsu

Eine neuere Version dieses Produkts ist verfügbar

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NEU TXV0106-Q1 AKTIV Automotive dual-supply fixed-direction six-channel voltage translator 6 channel device with improved timing specs such as rise/fall time, skew, and propagation delay.

SN74AXC8T245-Q1

AKTIV

Produktdetails

Technology family AXC Applications RGMII Bits (#) 8 High input voltage (min) (V) 0.455 High input voltage (max) (V) 3.6 Vout (min) (V) 0.65 Vout (max) (V) 3.6 Data rate (max) (Mbps) 380 IOH (max) (mA) -12 IOL (max) (mA) 12 Supply current (max) (µA) 60 Features Output enable, Overvoltage tolerant inputs, Partial power down (Ioff), Vcc isolation Input type Standard CMOS Output type 3-State, Balanced CMOS, Push-Pull Rating Automotive Operating temperature range (°C) -40 to 125
Technology family AXC Applications RGMII Bits (#) 8 High input voltage (min) (V) 0.455 High input voltage (max) (V) 3.6 Vout (min) (V) 0.65 Vout (max) (V) 3.6 Data rate (max) (Mbps) 380 IOH (max) (mA) -12 IOL (max) (mA) 12 Supply current (max) (µA) 60 Features Output enable, Overvoltage tolerant inputs, Partial power down (Ioff), Vcc isolation Input type Standard CMOS Output type 3-State, Balanced CMOS, Push-Pull Rating Automotive Operating temperature range (°C) -40 to 125
TSSOP (PW) 24 49.92 mm² 7.8 x 6.4 VQFN (RGY) 24 19.25 mm² 5.5 x 3.5 VQFN (RHL) 24 19.25 mm² 5.5 x 3.5
  • AEC-Q100 qualified for automotive applications
  • Available in wettable flank QFN (WRGY) package
  • Qualified fully configurable dual-rail design allows each port to operate with a power supply range from 0.65V to 3.6V
  • Operating temperature from –40°C to +125°C
  • Multiple direction-control pins to allow simultaneous up and down translation
  • Up to 380Mbps support when translating from 1.8V to 3.3V
  • VCC isolation feature to effectively Isolate both buses in a power-down scenario
  • Partial power-down mode to limit backflow current in a power-down scenario
  • Compatible with SN74AVC8T245-Q1 level shifter
  • Latch-up performance exceeds 100mA per JESD 78, class II
  • AEC-Q100 qualified for automotive applications
  • Available in wettable flank QFN (WRGY) package
  • Qualified fully configurable dual-rail design allows each port to operate with a power supply range from 0.65V to 3.6V
  • Operating temperature from –40°C to +125°C
  • Multiple direction-control pins to allow simultaneous up and down translation
  • Up to 380Mbps support when translating from 1.8V to 3.3V
  • VCC isolation feature to effectively Isolate both buses in a power-down scenario
  • Partial power-down mode to limit backflow current in a power-down scenario
  • Compatible with SN74AVC8T245-Q1 level shifter
  • Latch-up performance exceeds 100mA per JESD 78, class II

The SN74AXC8T245-Q1 AEC-Q100 qualified device is an 8-bit non-inverting bus transceiver that resolves voltage level mismatch between devices operating at the latest voltage nodes (0.7V, 0.8V, and 0.9V) and devices operating at industry standard voltage nodes (1.8V, 2.5V, and 3.3V) and vice versa.

The device operates by using two independent power-supply rails (VCCA and VCCB) that operate as low as 0.65V. Data pins A1 through A8 are designed to track VCCA, which accepts any supply voltage from 0.65V to 3.6V. Data pins B1 through B8 are designed to track VCCB, which accepts any supply voltage from 0.65V to 3.6V.

The SN74AXC8T245-Q1 device is designed for asynchronous communication between data buses. The device transmits data from the A bus to the B bus or from the B bus to the A bus, depending on the logic level of the direction-control inputs (DIR1 and DIR2). The output-enable (OE) input is used to disable the outputs so the buses are effectively isolated.

The SN74AXC8T245-Q1 device is designed so the control pins (DIR and OE) are referenced to VCCA.

This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs when the device is powered down. This inhibits current backflow into the device which prevents damage to the device.

The VCC isolation feature is designed so that if either VCC input supply is below 100mV, all level shifter outputs are disabled and placed into a high-impedance state.

To put the level shifter I/Os in the high-impedance state during power up or power down, tie OE to VCCA through a pullup resistor; the current-sinking capability of the driver determines the minimum value of the resistor.

The SN74AXC8T245-Q1 AEC-Q100 qualified device is an 8-bit non-inverting bus transceiver that resolves voltage level mismatch between devices operating at the latest voltage nodes (0.7V, 0.8V, and 0.9V) and devices operating at industry standard voltage nodes (1.8V, 2.5V, and 3.3V) and vice versa.

The device operates by using two independent power-supply rails (VCCA and VCCB) that operate as low as 0.65V. Data pins A1 through A8 are designed to track VCCA, which accepts any supply voltage from 0.65V to 3.6V. Data pins B1 through B8 are designed to track VCCB, which accepts any supply voltage from 0.65V to 3.6V.

The SN74AXC8T245-Q1 device is designed for asynchronous communication between data buses. The device transmits data from the A bus to the B bus or from the B bus to the A bus, depending on the logic level of the direction-control inputs (DIR1 and DIR2). The output-enable (OE) input is used to disable the outputs so the buses are effectively isolated.

The SN74AXC8T245-Q1 device is designed so the control pins (DIR and OE) are referenced to VCCA.

This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs when the device is powered down. This inhibits current backflow into the device which prevents damage to the device.

The VCC isolation feature is designed so that if either VCC input supply is below 100mV, all level shifter outputs are disabled and placed into a high-impedance state.

To put the level shifter I/Os in the high-impedance state during power up or power down, tie OE to VCCA through a pullup resistor; the current-sinking capability of the driver determines the minimum value of the resistor.

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Technische Dokumentation

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Typ Titel Datum
* Data sheet SN74AXC8T245-Q1 Automotive 8-Bit Dual-Supply Bus Transceiver With Configurable Voltage Translation and Tri-State Outputs datasheet (Rev. D) PDF | HTML 30 Jan 2024
Application note Schematic Checklist - A Guide to Designing With Fixed or Direction Control Translators PDF | HTML 02 Okt 2024
Application note Schematic Checklist - A Guide to Designing with Auto-Bidirectional Translators PDF | HTML 12 Jul 2024
Application note Understanding Transient Drive Strength vs. DC Drive Strength in Level-Shifters (Rev. A) PDF | HTML 03 Jul 2024
Functional safety information SN74AXC8T245-Q1 Functional Safety FIT Rate, FMD and Pin FMA PDF | HTML 19 Mär 2024
EVM User's guide TXV010xEVM Evaluation Module User's Guide PDF | HTML 05 Feb 2024
Application note Overcoming Design Challenges - Implementing High Performance Interfaces PDF | HTML 12 Dez 2023
Application brief Translate Voltages for RGMII (Rev. A) PDF | HTML 06 Aug 2021
Selection guide Voltage Translation Buying Guide (Rev. A) 15 Apr 2021
Application note Low Voltage Translation for SPI, UART, RGMII, JTAG Interfaces (Rev. B) PDF | HTML 29 Mär 2021
Application note Glitch free power sequencing with AXC level translators (Rev. A) 20 Sep 2018

Design und Entwicklung

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Simulationsmodell

SN74AXC8T245 IBIS Model (Rev. D)

SCEM580D.ZIP (84 KB) - IBIS Model
Gehäuse Pins CAD-Symbole, Footprints und 3D-Modelle
TSSOP (PW) 24 Ultra Librarian
VQFN (RGY) 24 Ultra Librarian
VQFN (RHL) 24 Ultra Librarian

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