TMS570LS0714-S

AKTIV

Hochleistungsfähiger 32-Bit ARM Cortex-R5-basierter Mikrocontroller

Produktdetails

CPU Arm Cortex-R4F Frequency (MHz) 160 Flash memory (kByte) 786 RAM (kByte) 128 ADC type 2 12-bit MibADC Total processing (MIPS) 0.0001 Features CAN, Hercules high-performance microcontroller, SPI, UART UART 2 CAN (#) 3 PWM (Ch) 54 TI functional safety category Functional Safety-Compliant Number of ADC channels 16 SPI 1 Operating temperature range (°C) -40 to 125 Rating Automotive Communication interface CAN, SPI, UART Operating system AutoSAR, FreeRTOS, SafeRTOS Hardware accelerators Floating point unit Nonvolatile memory (kByte) 786 Number of GPIOs 64 Number of I2Cs 1
CPU Arm Cortex-R4F Frequency (MHz) 160 Flash memory (kByte) 786 RAM (kByte) 128 ADC type 2 12-bit MibADC Total processing (MIPS) 0.0001 Features CAN, Hercules high-performance microcontroller, SPI, UART UART 2 CAN (#) 3 PWM (Ch) 54 TI functional safety category Functional Safety-Compliant Number of ADC channels 16 SPI 1 Operating temperature range (°C) -40 to 125 Rating Automotive Communication interface CAN, SPI, UART Operating system AutoSAR, FreeRTOS, SafeRTOS Hardware accelerators Floating point unit Nonvolatile memory (kByte) 786 Number of GPIOs 64 Number of I2Cs 1
LQFP (PGE) 144 484 mm² (22 mm × 22 mm)
  • High-Performance Automotive-Grade Microcontroller (MCU) for Safety-Critical Applications
    • Dual CPUs Running in Lockstep
    • ECC on Flash and RAM Interfaces
    • Built-In Self-Test (BIST) for CPU and On-chip RAMs
    • Error Signaling Module With Error Pin
    • Voltage and Clock Monitoring
  • ARM Cortex-R4F 32-Bit RISC CPU
    • 1.66 DMIPS/MHz With 8-Stage Pipeline
    • FPU With Single and Double Precision
    • 12-Region Memory Protection Unit (MPU)
    • Open Architecture With Third-Party Support
  • Operating Conditions
    • Up to 160-MHz System Clock
    • Core Supply Voltage (VCC): 1.14 to 1.32 V
    • I/O Supply Voltage (VCCIO): 3.0 to 3.6 V
  • Integrated Memory
    • 768KB of Flash With ECC
    • 128KB of RAM With ECC
    • 64KB of Flash for Emulated EEPROM With ECC
  • Common Platform Architecture
    • Consistent Memory Map Across Family
    • Real-Time Interrupt Timer (RTI) OS Timer
    • 128-Channel Vectored Interrupt Module (VIM)
    • 2-Channel Cyclic Redundancy Checker (CRC)
  • Direct Memory Access (DMA) Controller
    • 16 Channels and 32 Peripheral Requests
    • Parity for Control Packet RAM
    • DMA Accesses Protected by Dedicated MPU
  • Frequency-Modulated Phase-Locked Loop (FMPLL) With Built-In Slip Detector
  • IEEE 1149.1 JTAG, Boundary Scan and ARM CoreSight Components
  • Advanced JTAG Security Module (AJSM)
  • Up to 64 General-Purpose I/O (GIO) Pins
    • Up to 16 GIO Pins With Interrupt Generation Capability
  • Enhanced Timing Peripherals
    • 7 Enhanced Pulse Width Modulator (ePWM) Modules
    • 6 Enhanced Capture (eCAP) Modules
    • 2 Enhanced Quadrature Encoder Pulse (eQEP) Modules
  • Two Next Generation High-End Timer (N2HET) Modules
    • N2HET1: 32 Programmable Channels
    • N2HET2: 18 Programmable Channels
    • 160-Word Instruction RAM With Parity Protection Each
    • Each N2HET Includes Hardware Angle Generator
    • Dedicated High-End Timer Transfer Unit (HTU) for Each N2HET
  • Two 12-Bit Multibuffered ADC Modules
    • ADC1: 24 Channels
    • ADC2: 16 Channels
    • 16 Shared Channels
    • 64 Result Buffers With Parity Protection Each
  • Multiple Communication Interfaces
    • Up to Three CAN Controllers (DCANs)
      • 64 Mailboxes With Parity Protection Each
      • Compliant to CAN Protocol Version 2.0A and 2.0B
    • Inter-Integrated Circuit (I2C)
    • 3 Multibuffered Serial Peripheral Interfaces (MibSPIs)
      • 128 Words With Parity Protection Each
      • 8 Transfer Groups
    • One Standard Serial Peripheral Interface (SPI) Module
    • Two UART (SCI) Interfaces, One With Local Interconnect Network (LIN 2.1) Interface Support
  • Packages
    • 144-Pin Quad Flatpack (PGE) [Green]
    • 100-Pin Quad Flatpack (PZ) [Green]

All trademarks are the property of their respective owners.

  • High-Performance Automotive-Grade Microcontroller (MCU) for Safety-Critical Applications
    • Dual CPUs Running in Lockstep
    • ECC on Flash and RAM Interfaces
    • Built-In Self-Test (BIST) for CPU and On-chip RAMs
    • Error Signaling Module With Error Pin
    • Voltage and Clock Monitoring
  • ARM Cortex-R4F 32-Bit RISC CPU
    • 1.66 DMIPS/MHz With 8-Stage Pipeline
    • FPU With Single and Double Precision
    • 12-Region Memory Protection Unit (MPU)
    • Open Architecture With Third-Party Support
  • Operating Conditions
    • Up to 160-MHz System Clock
    • Core Supply Voltage (VCC): 1.14 to 1.32 V
    • I/O Supply Voltage (VCCIO): 3.0 to 3.6 V
  • Integrated Memory
    • 768KB of Flash With ECC
    • 128KB of RAM With ECC
    • 64KB of Flash for Emulated EEPROM With ECC
  • Common Platform Architecture
    • Consistent Memory Map Across Family
    • Real-Time Interrupt Timer (RTI) OS Timer
    • 128-Channel Vectored Interrupt Module (VIM)
    • 2-Channel Cyclic Redundancy Checker (CRC)
  • Direct Memory Access (DMA) Controller
    • 16 Channels and 32 Peripheral Requests
    • Parity for Control Packet RAM
    • DMA Accesses Protected by Dedicated MPU
  • Frequency-Modulated Phase-Locked Loop (FMPLL) With Built-In Slip Detector
  • IEEE 1149.1 JTAG, Boundary Scan and ARM CoreSight Components
  • Advanced JTAG Security Module (AJSM)
  • Up to 64 General-Purpose I/O (GIO) Pins
    • Up to 16 GIO Pins With Interrupt Generation Capability
  • Enhanced Timing Peripherals
    • 7 Enhanced Pulse Width Modulator (ePWM) Modules
    • 6 Enhanced Capture (eCAP) Modules
    • 2 Enhanced Quadrature Encoder Pulse (eQEP) Modules
  • Two Next Generation High-End Timer (N2HET) Modules
    • N2HET1: 32 Programmable Channels
    • N2HET2: 18 Programmable Channels
    • 160-Word Instruction RAM With Parity Protection Each
    • Each N2HET Includes Hardware Angle Generator
    • Dedicated High-End Timer Transfer Unit (HTU) for Each N2HET
  • Two 12-Bit Multibuffered ADC Modules
    • ADC1: 24 Channels
    • ADC2: 16 Channels
    • 16 Shared Channels
    • 64 Result Buffers With Parity Protection Each
  • Multiple Communication Interfaces
    • Up to Three CAN Controllers (DCANs)
      • 64 Mailboxes With Parity Protection Each
      • Compliant to CAN Protocol Version 2.0A and 2.0B
    • Inter-Integrated Circuit (I2C)
    • 3 Multibuffered Serial Peripheral Interfaces (MibSPIs)
      • 128 Words With Parity Protection Each
      • 8 Transfer Groups
    • One Standard Serial Peripheral Interface (SPI) Module
    • Two UART (SCI) Interfaces, One With Local Interconnect Network (LIN 2.1) Interface Support
  • Packages
    • 144-Pin Quad Flatpack (PGE) [Green]
    • 100-Pin Quad Flatpack (PZ) [Green]

All trademarks are the property of their respective owners.

The TMS570LS0714 device is part of the Hercules TMS570 series of high-performance automotive-grade ARM® Cortex®-R-based MCUs. Comprehensive documentation, tools, and software are available to assist in the development of ISO 26262 and IEC 61508 functional safety applications. Start evaluating today with the Hercules Hercules TMS570 LaunchPad Development Kit. The TMS570LS0714 device has on-chip diagnostic features including: dual CPUs in lockstep; CPU and memory Built-In Self-Test (BIST) logic; ECC on both the flash and the SRAM; parity on peripheral memories; and loopback capability on most peripheral I/Os.

The TMS570LS0714 device integrates the ARM Cortex-R4F floating-point CPU which offers an efficient 1.66 DMIPS/MHz, and has configurations which can run up to 160 MHz providing up to 265 DMIPS. The TMS570 device supports the word invariant big-endian [BE32] format.

The TMS570LS0714 device has 768KB of integrated flash and 128KB of RAM configurations with single-bit error correction and double-bit error detection. The flash memory on this device is nonvolatile, electrically erasable and programmable, and is implemented with a 64-bit-wide data bus interface. The flash operates on a 3.3-V supply input (same level as the I/O supply) for all read, program, and erase operations. The SRAM supports single-cycle read and write accesses in byte, halfword, word, and doubleword modes throughout the supported frequency range.

The TMS570LS0714 device features peripherals for real-time control-based applications, including two Next-Generation High-End Timer (N2HET) timing coprocessors with up to 44 total I/O terminals, seven Enhanced PWM (ePWM) modules with up to 14 outputs, six Enhanced Capture (eCAP) modules, two Enhanced Quadrature Encoder Pulse (eQEP) modules, and two 12-bit Analog-to-Digital Converters (ADCs) supporting up to 24 inputs.

The N2HET is an advanced intelligent timer that provides sophisticated timing functions for real-time applications. The timer is software-controlled, using a reduced instruction set, with a specialized timer micromachine and an attached I/O port. The N2HET can be used for pulse-width-modulated outputs, capture or compare inputs, or general-purpose I/O (GIO). The N2HET is especially well suited for applications requiring multiple sensor information and drive actuators with complex and accurate time pulses. A High-End Timer Transfer Unit (HTU) can transfer N2HET data to or from main memory. A Memory Protection Unit (MPU) is built into the HTU.

The ePWM module can generate complex pulse width waveforms with minimal CPU overhead or intervention. The ePWM is easy to use and supports complementary PWMs and deadband generation. With integrated trip zone protection and synchronization with the on-chip MibADC, the ePWM is ideal for digital motor control applications.

The eCAP module is essential in systems where the accurately timed capture of external events is important. The eCAP can also be used to monitor the ePWM outputs or to generate simple PWM when not needed for capture applications.

The eQEP module is used for direct interface with a linear or rotary incremental encoder to get position, direction, and speed information from a rotating machine as used in high-performance motion and position-control systems.

The device has two 12-bit-resolution MibADCs with 24 total inputs and 64 words of parity-protected buffer RAM each. The MibADC channels can be converted individually or can be grouped by software for sequential conversion sequences. Sixteen inputs are shared between the two MibADCs. There are three separate groups. Each group can be converted once when triggered or configured for continuous conversion mode. The MibADC has a 10-bit mode for use when compatibility with older devices or faster conversion time is desired.

The device has multiple communication interfaces: three MibSPIs; two SPIs; two SCIs, one of which can be used as LIN; up to three DCANs; and one I2C module. The SPI provides a convenient method of serial interaction for high-speed communications between similar shift-register type devices. The LIN supports the Local Interconnect standard 2.0 and can be used as a UART in full-duplex mode using the standard Non-Return-to-Zero (NRZ) format. The DCAN supports the CAN 2.0B protocol standard and uses a serial, multimaster communication protocol that efficiently supports distributed real-time control with robust communication rates of up to 1 Mbps. The DCAN is ideal for applications operating in noisy and harsh environments (for example, automotive and industrial fields) that require reliable serial communication or multiplexed wiring.

The I2C module is a multimaster communication module providing an interface between the microcontroller and an I2C-compatible device through the I2C serial bus. The I2C module supports speeds of 100 and 400 kbps.

A Frequency-Modulated Phase-Locked Loop (FMPLL) clock module is used to multiply the external frequency reference to a higher frequency for internal use. The FMPLL provides one of the six possible clock source inputs to the Global Clock Module (GCM). The GCM manages the mapping between the available clock sources and the device clock domains.

The device also has an external clock prescaler (ECP) circuit that when enabled, outputs a continuous external clock on the ECLK terminal. The ECLK frequency is a user-programmable ratio of the peripheral interface clock (VCLK) frequency. This low-frequency output can be monitored externally as an indicator of the device operating frequency.

The Direct Memory Access (DMA) controller has 16 channels, 32 peripheral requests, and parity protection on its memory. An MPU is built into the DMA to protect memory against erroneous transfers.

The Error Signaling Module (ESM) monitors device errors and determines whether an interrupt or external error signal (nERROR) is asserted when a fault is detected. The nERROR terminal can be monitored externally as an indicator of a fault condition in the microcontroller.

With integrated functional safety features and a wide choice of communication and control peripherals, the TMS570LS0714 device is an ideal solution for high-performance, real-time control applications with safety-critical

The TMS570LS0714 device is part of the Hercules TMS570 series of high-performance automotive-grade ARM® Cortex®-R-based MCUs. Comprehensive documentation, tools, and software are available to assist in the development of ISO 26262 and IEC 61508 functional safety applications. Start evaluating today with the Hercules Hercules TMS570 LaunchPad Development Kit. The TMS570LS0714 device has on-chip diagnostic features including: dual CPUs in lockstep; CPU and memory Built-In Self-Test (BIST) logic; ECC on both the flash and the SRAM; parity on peripheral memories; and loopback capability on most peripheral I/Os.

The TMS570LS0714 device integrates the ARM Cortex-R4F floating-point CPU which offers an efficient 1.66 DMIPS/MHz, and has configurations which can run up to 160 MHz providing up to 265 DMIPS. The TMS570 device supports the word invariant big-endian [BE32] format.

The TMS570LS0714 device has 768KB of integrated flash and 128KB of RAM configurations with single-bit error correction and double-bit error detection. The flash memory on this device is nonvolatile, electrically erasable and programmable, and is implemented with a 64-bit-wide data bus interface. The flash operates on a 3.3-V supply input (same level as the I/O supply) for all read, program, and erase operations. The SRAM supports single-cycle read and write accesses in byte, halfword, word, and doubleword modes throughout the supported frequency range.

The TMS570LS0714 device features peripherals for real-time control-based applications, including two Next-Generation High-End Timer (N2HET) timing coprocessors with up to 44 total I/O terminals, seven Enhanced PWM (ePWM) modules with up to 14 outputs, six Enhanced Capture (eCAP) modules, two Enhanced Quadrature Encoder Pulse (eQEP) modules, and two 12-bit Analog-to-Digital Converters (ADCs) supporting up to 24 inputs.

The N2HET is an advanced intelligent timer that provides sophisticated timing functions for real-time applications. The timer is software-controlled, using a reduced instruction set, with a specialized timer micromachine and an attached I/O port. The N2HET can be used for pulse-width-modulated outputs, capture or compare inputs, or general-purpose I/O (GIO). The N2HET is especially well suited for applications requiring multiple sensor information and drive actuators with complex and accurate time pulses. A High-End Timer Transfer Unit (HTU) can transfer N2HET data to or from main memory. A Memory Protection Unit (MPU) is built into the HTU.

The ePWM module can generate complex pulse width waveforms with minimal CPU overhead or intervention. The ePWM is easy to use and supports complementary PWMs and deadband generation. With integrated trip zone protection and synchronization with the on-chip MibADC, the ePWM is ideal for digital motor control applications.

The eCAP module is essential in systems where the accurately timed capture of external events is important. The eCAP can also be used to monitor the ePWM outputs or to generate simple PWM when not needed for capture applications.

The eQEP module is used for direct interface with a linear or rotary incremental encoder to get position, direction, and speed information from a rotating machine as used in high-performance motion and position-control systems.

The device has two 12-bit-resolution MibADCs with 24 total inputs and 64 words of parity-protected buffer RAM each. The MibADC channels can be converted individually or can be grouped by software for sequential conversion sequences. Sixteen inputs are shared between the two MibADCs. There are three separate groups. Each group can be converted once when triggered or configured for continuous conversion mode. The MibADC has a 10-bit mode for use when compatibility with older devices or faster conversion time is desired.

The device has multiple communication interfaces: three MibSPIs; two SPIs; two SCIs, one of which can be used as LIN; up to three DCANs; and one I2C module. The SPI provides a convenient method of serial interaction for high-speed communications between similar shift-register type devices. The LIN supports the Local Interconnect standard 2.0 and can be used as a UART in full-duplex mode using the standard Non-Return-to-Zero (NRZ) format. The DCAN supports the CAN 2.0B protocol standard and uses a serial, multimaster communication protocol that efficiently supports distributed real-time control with robust communication rates of up to 1 Mbps. The DCAN is ideal for applications operating in noisy and harsh environments (for example, automotive and industrial fields) that require reliable serial communication or multiplexed wiring.

The I2C module is a multimaster communication module providing an interface between the microcontroller and an I2C-compatible device through the I2C serial bus. The I2C module supports speeds of 100 and 400 kbps.

A Frequency-Modulated Phase-Locked Loop (FMPLL) clock module is used to multiply the external frequency reference to a higher frequency for internal use. The FMPLL provides one of the six possible clock source inputs to the Global Clock Module (GCM). The GCM manages the mapping between the available clock sources and the device clock domains.

The device also has an external clock prescaler (ECP) circuit that when enabled, outputs a continuous external clock on the ECLK terminal. The ECLK frequency is a user-programmable ratio of the peripheral interface clock (VCLK) frequency. This low-frequency output can be monitored externally as an indicator of the device operating frequency.

The Direct Memory Access (DMA) controller has 16 channels, 32 peripheral requests, and parity protection on its memory. An MPU is built into the DMA to protect memory against erroneous transfers.

The Error Signaling Module (ESM) monitors device errors and determines whether an interrupt or external error signal (nERROR) is asserted when a fault is detected. The nERROR terminal can be monitored externally as an indicator of a fault condition in the microcontroller.

With integrated functional safety features and a wide choice of communication and control peripherals, the TMS570LS0714 device is an ideal solution for high-performance, real-time control applications with safety-critical

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Technische Dokumentation

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Top-Dokumentation Typ Titel Format-Optionen Neueste englische Version herunterladen Datum
* Datenblatt TMS570LS0714 16- and 32-Bit RISC Flash Microcontroller datasheet (Rev. E) PDF | HTML 10.11.2016
* Errata TMS570LS09/07xx Microcontroller Silicon Errata (Silicon Rev 0) (Rev. D) 31.05.2016
* Errata TMS570LS09/07xx Microcontroller Silicon Errata (Silicon Rev A) (Rev. B) 31.05.2016
Informationen zur funktionalen Sicherheit Certification for Functional Safety Hardware Process (Rev. C) 06.06.2025
Zertifikat TUEV SUED Certificate for TMS570LS09X/07x (Rev. B) 21.06.2024
Weitere Dokumente Hercules™ Diagnostic Library Test Automation Unit User Guide (Rev. B) PDF | HTML 09.01.2020
Informationen zur funktionalen Sicherheit HALCoGen-CSP Installation Guide (Rev. B) PDF | HTML 08.01.2020
Informationen zur funktionalen Sicherheit HALCoGen-CSP User's Guide (Rev. C) PDF | HTML 08.01.2020
Informationen zur funktionalen Sicherheit Hercules Diagnostic Library -TAU Installation Guide (Rev. B) PDF | HTML 08.01.2020
Weitere Dokumente HALCoGen-CSP 04.07.01 (Rev. C) PDF | HTML 08.01.2020
Benutzerhandbuch Hercules Diagnostic Library CSP Without LDRA 29.10.2019
Weitere Dokumente Diagnostic Library CSP Release Notes 17.10.2019
Informationen zur funktionalen Sicherheit SafeTI™ Hercules™ Diagnostic Library Release Notes (Rev. A) 24.09.2019
Anwendungshinweis Hercules PLL Advisory SSWF021#45 Workaround (Rev. B) PDF | HTML 09.09.2019
Anwendungshinweis CAN Bus Bootloader for Hercules Microcontrollers PDF | HTML 21.08.2019
Benutzerhandbuch HALCoGen-CSP Without LDRA Installation Guide PDF | HTML 19.08.2019
Benutzerhandbuch HALCoGen-CSP Without LDRA User's Guide PDF | HTML 19.08.2019
Benutzerhandbuch Hercules™ Diag Lib Test Automation Unit Without LDRA User's Guide PDF | HTML 19.08.2019
Benutzerhandbuch Hercules Diagnostic Library - Without LDRA Installation Guide PDF | HTML 19.08.2019
Anwendungshinweis HALCoGen CSP Without LDRA Release_Notes 19.08.2019
Anwendungshinweis Interfacing the Embedded 12-Bit ADC in a TMS570LS31x/21x and RM4x Series MCUs (Rev. A) 20.04.2018
Anwendungshinweis FreeRTOS on Hercules Devices_new 19.04.2018
Benutzerhandbuch TMS570LS09x/07x 16/32-Bit RISC Flash Microcontroller Technical Reference Manual (Rev. A) 01.03.2018
Anwendungshinweis Sharing FEE Blocks Between the Bootloader and the Application 07.11.2017
Benutzerhandbuch Hercules™ TMS570LS12x/RM46 LaunchPad User's Guide 31.05.2017
Anwendungshinweis Sharing Exception Vectors on Hercules™ Based Microcontrollers 27.03.2017
Informationen zur funktionalen Sicherheit Safety Manual for TMS570LS07x/09x Hercules ARM Safety Critical MCUs (Rev. A) 12.12.2016
Anwendungshinweis Hercules AJSM Unlock (Rev. A) PDF | HTML 19.10.2016
Anwendungshinweis How to Create a HALCoGen Based Project For CCS (Rev. B) 09.08.2016
Anwendungshinweis Using the CRC Module on Hercules™-Based Microcontrollers 04.08.2016
Anwendungshinweis Migrating from TMS570LS12x/11x to TMS570LS09x/07x MCUs (Rev. A) 15.06.2016
Informationen zur funktionalen Sicherheit Functional Safety Audit: SafeTI Functional Safety Hardware Development (Rev. A) 25.04.2016
Anwendungshinweis High Speed Serial Bus Using the MibSPIP Module on Hercules-Based MCUs 22.04.2016
Informationen zur funktionalen Sicherheit Enabling Functional Safety Using SafeTI Diagnostic Library 18.12.2015
Informationen zur funktionalen Sicherheit Safety Manual for TMS570LS12x/11x Hercules ARM Safety Critical MCUs (Rev. B) 11.12.2015
Whitepaper Hercules™ MCU: Features Applicable to Use in High-Speed Rail 02.11.2015
Anwendungshinweis Triggering ADC Using Internal Timer Events on Hercules MCUs 19.10.2015
Whitepaper Extending TI’s Hercules MCUs with the integrated flexible HET 29.09.2015
Anwendungshinweis Continuous Monitor of the PLL Frequency With the DCC 24.07.2015
Anwendungshinweis PWM Generation and Input Capture Using HALCoGen N2HET Module 30.06.2015
Anwendungshinweis Sine Wave Generation Using PWM With Hercules N2HET and HTU 12.05.2015
Informationen zur funktionalen Sicherheit Foundational Software for Functional Safety 12.05.2015
Anwendungshinweis Triangle/Trapezoid Wave Generation Using PWM With Hercules N2HET 01.05.2015
Anwendungshinweis Nested Interrupts on Hercules ARM Cortex-R4/5-Based Microncontrollers 23.04.2015
Whitepaper Latch-Up White Paper PDF | HTML 22.04.2015
Anwendungshinweis Interrupt and Exception Handling on Hercules ARM Cortex-R4/5-Based MCUs 20.04.2015
Anwendungshinweis Monitoring PWM Using N2HET 02.04.2015
Anwendungshinweis Hercules SCI With DMA 22.03.2015
Zertifikat TÜV NORD Certificate for Functional Safety Software Development Process 03.02.2015
Informationen zur funktionalen Sicherheit Calculating Equivalent Power-on-Hours for Hercules Safety MCUs 26.01.2015
Anwendungshinweis Limiting Clamp Currents on TMS470/TMS570 Digital and Analog Inputs (Rev. A) 08.12.2014
Informationen zur funktionalen Sicherheit TUV SUD ISO-13849 Safety Architecture Concept Study 02.07.2014
Weitere Dokumente HaLCoGen Release Notes 25.06.2014
Anwendungshinweis Interfacing TPS65381 With Hercules Microcontrollers (Rev. A) 14.02.2014
Benutzerhandbuch TMS570LS12x Hercules Development Kit (HDK) User's Guide (Rev. A) 10.10.2013
Informationen zur funktionalen Sicherheit IEC 60730 and UL 1998 Safety Standard Compliance Made Easier with TI Hercules 03.10.2013
Anwendungshinweis CAN Bus Bootloader for TMS570LS12X MCU 16.09.2013
Anwendungshinweis UART Bootloader for Hercules TMS570LS12X MCU 16.09.2013
Anwendungshinweis SPI Bootloader for Hercules TMS570LS12X MCU 16.09.2013
Anwendungshinweis Initialization of Hercules ARM Cortex-R4F Microcontrollers (Rev. D) 29.05.2013
Informationen zur funktionalen Sicherheit Accelerating safety-certified motor control designs (Rev. A) 04.10.2012
Anwendungshinweis Hercules Family Frequency Slewing to Reduce Voltage and Current Transients 05.07.2012
Anwendungshinweis Basic PBIST Configuration and Influence on Current Consumption (Rev. C) 12.04.2012
Anwendungshinweis Verification of Data Integrity Using CRC 17.02.2012
Informationen zur funktionalen Sicherheit Important ARM Ltd Application Notes for TI Hercules ARM Safety MCUs 17.11.2011
Benutzerhandbuch HET Integrated Development Environment User's Guide (Rev. A) 17.11.2011
Informationen zur funktionalen Sicherheit Execution Time Measurement for Hercules ARM Safety MCUs (Rev. A) 04.11.2011
Anwendungshinweis Use of All 1'’s and All 0's Valid in Flash EEPROM Emulation 27.09.2011
Anwendungshinweis 3.3 V I/O Considerations for Hercules Safety MCUs (Rev. A) 06.09.2011
Informationen zur funktionalen Sicherheit ADC Source Impedance for Hercules ARM Safety MCUs (Rev. B) 06.09.2011
Informationen zur funktionalen Sicherheit Leveraging the High-End Timer Transfer Unit on Hercules ARM Safety MCUs (Rev. A) 06.09.2011
Informationen zur funktionalen Sicherheit Configuring a CAN Node on Hercules ARM Safety MCUs 06.09.2011
Informationen zur funktionalen Sicherheit Configuring the Hercules ARM Safety MCU SCI/LIN Module for UART Communication (Rev. A) 06.09.2011
Informationen zur funktionalen Sicherheit Hercules™ Microcontrollers: Real-time MCUs for safety-critical products 02.09.2011
Anwendungshinweis ECC Handling in TMSx70-Based Microcontrollers 23.02.2011
Benutzerhandbuch TI ICEPick Module Type C Reference Guide Public Version 17.02.2011
Anwendungshinweis NHET Getting Started (Rev. B) 30.08.2010
Informationen zur funktionalen Sicherheit Generating Operating System Tick Using RTI on a Hercules ARM Safety MCU 13.07.2010
Informationen zur funktionalen Sicherheit Usage of MPU Subregions on TI Hercules ARM Safety MCUs 10.03.2010
Benutzerhandbuch TI Assembly Language Tools Enhanced High-End Timer (NHET) Assembler User's Guide 04.03.2010
Whitepaper Discriminating between Soft Errors and Hard Errors in RAM White Paper 04.06.2008

Design und Entwicklung

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Debug-Tastkopf

TMDSEMU200-U — XDS200-USB-Debug-Tastkopf

Der XDS200 ist ein Debug-Tastkopf (Emulator) zum Debugging von Embedded-Bausteinen von TI. Für die meisten Bausteine wird die Verwendung der neueren, kostengünstigeren XDS110 (www.ti.com/tool/TMDSEMU110-U) empfohlen. Der XDS200 unterstützt eine große Zahl von Standards (IEEE1149.1, IEEE1149.7, SWD) (...)

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Debug-Tastkopf

TMDSEMU560V2STM-U — XDS560™-Software v2 – System-Trace-USB-Debug-Sonde

XDS560v2 ist die Debug-Sonde mit der höchsten Leistung der XDS560™-Produktfamilie und unterstützt sowohl den herkömmlichen JTAG-Standard (IEEE1149.1) als auch cJTAG (IEEE1149.7).  Beachten Sie, dass das Serial Wire Debugging (SWD) nicht unterstützt wird.

Alle XDS-Debug-Sonden unterstützen Core- und (...)

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Debug-Tastkopf

TMDSEMU560V2STM-UE — XDS560v2 System-Trace-USB-und Ethernet-Debug-Tastkopf

The XDS560v2 is the highest performance of the XDS family of debug probes and supports both the traditional JTAG standard (IEEE1149.1) and cJTAG (IEEE1149.7). Note that it does not support serial wire debug (SWD).

All XDS debug probes support Core and System Trace in all ARM and DSP processors that (...)

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Debug-Tastkopf

LB-3P-TRACE32-ARM — Debug- und Trace-System Lauterbach TRACE32® für Arm®-basierte Mikrocontroller und Prozessoren

Die TRACE32®-Tools von Lauterbach sind eine Suite hochmoderner Hardware- und Softwarekomponenten, mit denen Entwickler alle Arten von Arm®-basierten Mikrocontrollern und Prozessoren analysieren, optimieren und zertifizieren können. Die weltweit anerkannten Debugging- und Trace-Lösungen für (...)

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Hardware-Programmiertool

ALGO-3P-WRITENOW — Algocraft WriteNow! Programmierer

WriteNow! Die Reihe der systeminternen Programmierer ist ein Durchbruch in der Programmierbranche. Die Programmierer unterstützen eine große Anzahl von Bausteinen (Mikrocontroller, Speicher, CPLDs und andere programmierbare Bausteine) verschiedener Hersteller und verfügen über eine kompakte Größe (...)

Von: Algocraft
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IDE, Konfiguration, Compiler oder Debugger

CCSTUDIO — Code Composer Studio integrated development environment (IDE)

CCStudio™ IDE is part of TI's extensive CCStudio™ development ecosystem and is an integrated development environment for TI's microcontrollers, processors, wireless connectivity devices, and radar sensors. CCStudio IDE is available as desktop or cloud-based applications. The cloud version (...)

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HALCOGEN — HAL-Codegenerierungstools - TMS570 (v4.07.01)

HALCoGen allows users to generate hardware abstraction layer device drivers for Hercules™ microcontrollers. HALCoGen provides a graphical user interface that allows the user to configure peripherals, interrupts, clocks, and other Hercules microcontroller parameters. Once the Hercules device (...)

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HET_IDE — High-End-Timer (HET)

The High-End Timer (HET) is a programmable timer co-processor available on TI’s high-performance Hercules Microcontrollers. The HET enables sophisticated timing functions for real-time control applications. Programming the HET provides an alternate approach to the use of costly FPGAs or ASICs which (...)

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IDE, Konfiguration, Compiler oder Debugger

SAFETI-HERCULES-DIAG-LIB-CSP — SafeTI-Compliance-Support-Paket für Hercules-Diagnosebibliothek

The SafeTI Hercules Diagnostic Library Compliance Support Package (CSP) was developed to provide the necessary documentation and reports to assist customers using the SafeTI Hercules Diagnostic Library to comply with functional safety standards such as IEC 61508 and ISO 26262.

lock = Nur mit Exportgenehmigung (1 Minute)
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IDE, Konfiguration, Compiler oder Debugger

SAFETI_CQKIT — Safety-Compiler-Qualifizierungskit

Das Sicherheits-Compiler-Qualifizierungskit möchte Kunden dabei unterstützen, den Einsatz des ARM C/C++-Compilers C6000, C7000 oder C2000/CLA von TI für funktionale Sicherheitsstandards wie beispielsweise IEC 61508 und ISO 26262 zu qualifizieren.

Das Sicherheits-Compiler-Qualifizierungskit:

  • ist für (...)
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Treiber oder Bibliothek

F021FLASHAPI — F021 Flash-API

The F021 Flash Application Programming Interface (API) provides a software library of functions to program, erase, and verify F021 on-chip Flash memory.

These functions must be used when creating Flash bootloaders or other programming utilities for F021 Flash based microcontrollers.

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HERCULES-DSPLIB — Hercules Safety MCU Cortex-R4 CMSIS DSP Library (v1.0.0)

Die Cortex-R4-DSP-Bibliothek von TI ist konform mit dem ARM Cortex Microcontroller Software Interface Standard (CMSIS), einer standardisierten Hardwareabstraktionsschicht für die Cortex-Prozessorserie. Die CMSIS-DSP-Bibliothek enthält mehr als 60 Funktionen für Vektoroperationen, Matrixberechnung, (...)
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Treiber oder Bibliothek

SAFETI_DIAG_LIB — Hercules SafeTI Diagnostic Library (v2.4.0)

The Hercules SafeTI™ Diagnostic Library is a collection of software functions and response handlers for various safety features of the Hercules Safety MCUs. The Hercules SafeTI Diagnostic Library runs in the context of the caller's protection environment and all responses are handled in the (...)

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Software-Programmiertool

UNIFLASH — UniFlash for most TI microcontrollers (MCUs) and mmWave sensors

UniFlash ist Teil des umfassenden CCStudio™-Entwicklungsökosystem von TI und ein Softwaretool zur Programmierung des integrierten Flash-Speichers von TI-Mikrocontrollern und drahtlosen Kommunikationsbausteinen sowie des integrierten Flash-Speichers für TI-Prozessoren. UniFlash bietet sowohl (...)

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Support-Software

HERCULES_SAFETY_MCU_DEMOS — Hercules Software Kit (v4.0.0)

Die Hercules-Sicherheits-MCU-Demos beleuchten wichtige Sicherheits-, Datenerfassungs- und Steuerungsfunktionen der Hercules-Mikrocontrollerplattform. Die Demos eignen sich zur Ausführung auf einem PC in Verbindung mit einem USB-Entwicklungsstick für Hercules oder einem Hercules-Entwicklungskit (...)
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Support-Software

NHET-ASSEMBLER — TMS570 NHET Assembler Software (v2.0.1)

TI's Enhanced High-End Timer (NHET) module provides sophisticated timing functions for real-time control applications.

The NHET Assembler translates programs written in the NHET assembly language into multiple output formats for use in code-generation tools such as TI's Code Composer Studio.

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Support-Software

NOWECC — TMS570 nowECC v2.22.00

The Hercules microcontroller family contains as part of the embedded flash module a circuit that provides, the capability to detect and correct memory faults. This Single bit Error Correction and Double bit Error Detection circuit (SECDED) needs 8 Error correction check bits for every 64 bit of (...)
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Support-Software

VCTR-3P-MICROSAR — Vector MICROSAR AUTOSAR-Software für Mikrocontroller und Hochleistungscomputer (HPCs)

Die MICROSAR- und DaVinci-Produktfamilien vereinfachen die Steuergeräte-Entwicklung mit ausgefeilter Embedded-Software und leistungsstarken Entwicklungswerkzeugen für Mikrocontroller und HPCs. Mit fortschrittlicher Infrastruktursoftware schaffen Sie eine optimale Basis für Ihre Steuergeräte und (...)

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Simulationsmodell

TMS570LS07x PGE, PZ, and ZWT BSDL Model

SPNM060.ZIP (9 KB) - BSDL-Modell
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Simulationsmodell

TMS570LS09x, TMS570LS07x PGE Ibis Model

SPNM065.ZIP (361 KB) - IBIS-Modell
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Simulationsmodell

TMS570LS09x, TMS570LS07x PZ Ibis Model

SPNM064.ZIP (360 KB) - IBIS-Modell
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Berechnungstool

FMZPLL_CALCULATOR — FMzPLL-Konfigurationstool

The FMzPLL Calculator assists a user with the configuration of the FMzPLL on TMS570 microcontrollers. It allows the user to input:
  • OSCIN speed
  • multiplier setting
  • divider settings
  • frequency modulation settings
  • PLL/OSC fail options
Once the user has configured the desired options, the calculator displays (...)
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Gehäuse Pins CAD-Symbole, Footprints und 3D-Modelle
LQFP (PGE) 144 Ultra Librarian

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