The LM3881 Simple Power Sequencer offers the easiest method to control power up and power down of multiple power supplies (switching or linear regulators). By staggering the start-up sequence, it is possible to avoid latch conditions or large inrush currents that can affect the reliability of the system.
Available in VSSOP-8 package, the Simple Sequencer contains a precision enable pin and three open-drain output flags. When the LM3881 is enabled, the three output flags will sequentially release, after individual time delays, thus permitting the connected power supplies to start up. The output flags will follow a reverse sequence during power down to avoid latch conditions. Time delays are defined using an external capacitor and the output flag states can be inverted by the user.
| Tipo | Título | Fecha | ||
|---|---|---|---|---|
| * | Data sheet | LM3881 Simple Power Sequencer With Adjustable Timing datasheet (Rev. D) | PDF | HTML | 10 dic 2014 |
| Selection guide | Power Management Guide 2018 (Rev. R) | 25 jun 2018 | ||
| Technical article | How to manage processor power during uncontrolled power off | PDF | HTML | 21 jun 2018 | |
| Technical article | Sequencing solutions: simple, reliable and cost-effective | PDF | HTML | 27 sep 2017 | |
| Technical article | A simple six-channel power-rail sequencing solution | PDF | HTML | 16 nov 2015 | |
| Analog Design Journal | Power-supply sequencing for FPGAs | 24 oct 2014 | ||
| EVM User's guide | AN-1785 LM3881 Power Sequencer Evaluation Board (Rev. C) | 07 may 2013 | ||
| Application note | Power Supply Design Considerations for Modern FPGAs (Power Designer 121) | 02 feb 2010 |
Para conocer los términos adicionales o los recursos necesarios, haga clic en cualquier título de abajo para ver la página de detalles cuando esté disponible.
The LM3881 evaluation board has been designed to connect directly to the power supplies of an existing system to enable sequencing. Upon enabling the device, the three open drain output flags will rise in sequential order, 1-2-3. Once the part is disabled, the shutdown sequence will occur in (...)
| Encapsulado | Pines | Símbolos CAD, huellas y modelos 3D |
|---|---|---|
| VSSOP (DGK) | 8 | Ultra Librarian |
El contenido lo proporcionan “tal como está” TI y los colaboradores de la comunidad y no constituye especificaciones de TI. Consulte los términos de uso.
Si tiene preguntas sobre la calidad, el paquete o el pedido de productos de TI, consulte el soporte de TI.