TWL1200

ACTIVO

SDIO, UART y transceptor de conversión de tensión de audio

Detalles del producto

Bits (#) 19 Data rate (max) (Mbps) 60 Topology Open drain, Push-Pull Direction control (typ) Auto-direction Vin (min) (V) 1.1 Vin (max) (V) 3.6 Vout (min) (V) 1.1 Vout (max) (V) 3.6 Applications MMC, SD Card, SDIO, UART Audio Features Output enable Technology family TWL Supply current (max) (mA) 0.03 Rating Catalog Operating temperature range (°C) -40 to 85
Bits (#) 19 Data rate (max) (Mbps) 60 Topology Open drain, Push-Pull Direction control (typ) Auto-direction Vin (min) (V) 1.1 Vin (max) (V) 3.6 Vout (min) (V) 1.1 Vout (max) (V) 3.6 Applications MMC, SD Card, SDIO, UART Audio Features Output enable Technology family TWL Supply current (max) (mA) 0.03 Rating Catalog Operating temperature range (°C) -40 to 85
DSBGA (YFF) 49 9 mm² 3 x 3
  • Level Translator
    • VCCA and VCCB Range of 1.1 V to 3.6 V
  • Seamlessly Bridges 1.8-V/2.6-V Digital-Switching Compatibility
    Gap Between 2.6-V processors and TI’s Wi-Link (WL1271 and WL1273)
  • Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II
  • ESD Protection Exceeds JESD 22
    • 2500-V Human-Body Model (A114-B)
    • 250-V Machine Model (A115-A)
    • 1500-V Charged-Device Model (C101)

  • Level Translator
    • VCCA and VCCB Range of 1.1 V to 3.6 V
  • Seamlessly Bridges 1.8-V/2.6-V Digital-Switching Compatibility
    Gap Between 2.6-V processors and TI’s Wi-Link (WL1271 and WL1273)
  • Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II
  • ESD Protection Exceeds JESD 22
    • 2500-V Human-Body Model (A114-B)
    • 250-V Machine Model (A115-A)
    • 1500-V Charged-Device Model (C101)

The TWL1200 is an 19-bit voltage translator specifically designed to seamlessly bridge the

1.8-V/2.6-V digital-switching compatibility gap between 2.6-V baseband and the TI Wi-Link-6 (WL1271/3). It is optimized for SDIO, UART, and audio functions. The TWL1200 has two supply-voltage pins, VCCA and VCCB, that can be operated over the full range of 1.1 V to 3.6 V. The TWL1200 enables system designers to easily interface applications processors or digital basebands to peripherals operating at a different I/O voltage levels, such as the TI Wi-Link-6 (WL1271/3) or other SDIO/memory cards.

The TWL1200 is offered in both 48-ball 0.5-mm ball grid array (BGA) and 49-bump 0.4-mm wafer chip scale package (WCSP) packages. Low static power consumption and small package size make the TWL1200 an ideal choice for mobile-phone applications.

The TWL1200 is an 19-bit voltage translator specifically designed to seamlessly bridge the

1.8-V/2.6-V digital-switching compatibility gap between 2.6-V baseband and the TI Wi-Link-6 (WL1271/3). It is optimized for SDIO, UART, and audio functions. The TWL1200 has two supply-voltage pins, VCCA and VCCB, that can be operated over the full range of 1.1 V to 3.6 V. The TWL1200 enables system designers to easily interface applications processors or digital basebands to peripherals operating at a different I/O voltage levels, such as the TI Wi-Link-6 (WL1271/3) or other SDIO/memory cards.

The TWL1200 is offered in both 48-ball 0.5-mm ball grid array (BGA) and 49-bump 0.4-mm wafer chip scale package (WCSP) packages. Low static power consumption and small package size make the TWL1200 an ideal choice for mobile-phone applications.

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Documentación técnica

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Tipo Título Fecha
* Data sheet SDIO, UART, and Audio Voltage-Translation Transceiver datasheet (Rev. A) 12 nov 2009
Application note Schematic Checklist - A Guide to Designing with Auto-Bidirectional Translators PDF | HTML 12 jul 2024
Application note Understanding Transient Drive Strength vs. DC Drive Strength in Level-Shifters (Rev. A) PDF | HTML 03 jul 2024
Selection guide Voltage Translation Buying Guide (Rev. A) 15 abr 2021
Application note TWL1200 PCB Design Guidelines 06 jul 2009

Diseño y desarrollo

Para conocer los términos adicionales o los recursos necesarios, haga clic en cualquier título de abajo para ver la página de detalles cuando esté disponible.

Modelo de simulación

TWL1200 IBIS Model

SLLM073.ZIP (1043 KB) - IBIS Model
Encapsulado Pines Símbolos CAD, huellas y modelos 3D
DSBGA (YFF) 49 Ultra Librarian

Pedidos y calidad

Información incluida:
  • RoHS
  • REACH
  • Marcado del dispositivo
  • Acabado de plomo/material de la bola
  • Clasificación de nivel de sensibilidad a la humedad (MSL) / reflujo máximo
  • Estimaciones de tiempo medio entre fallas (MTBF)/fallas en el tiempo (FIT)
  • Contenido del material
  • Resumen de calificaciones
  • Monitoreo continuo de confiabilidad
Información incluida:
  • Lugar de fabricación
  • Lugar de ensamblaje

Soporte y capacitación

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El contenido lo proporcionan “tal como está” TI y los colaboradores de la comunidad y no constituye especificaciones de TI. Consulte los términos de uso.

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