製品詳細

Rating HiRel Enhanced Product Integrated isolated power No Isolation rating Basic Number of channels 1 Forward/reverse channels 1 forward / 0 reverse Default output High Data rate (max) (MBps) 150 Surge isolation voltage (VIOSM) (VPK) 4000 Transient isolation voltage (VIOTM) (VPK) 4000 Withstand isolation voltage (VISO) (Vrms) 2500 CMTI (min) (V/µs) 25000 Operating temperature range (°C) -55 to 125 Supply voltage (max) (V) 5.5 Supply voltage (min) (V) 3 Propagation delay time (typ) (µs) 0.017 Current consumption per channel (DC) (typ) (mA) 4.3 Creepage (min) (mm) 6 Clearance (min) (mm) 6
Rating HiRel Enhanced Product Integrated isolated power No Isolation rating Basic Number of channels 1 Forward/reverse channels 1 forward / 0 reverse Default output High Data rate (max) (MBps) 150 Surge isolation voltage (VIOSM) (VPK) 4000 Transient isolation voltage (VIOTM) (VPK) 4000 Withstand isolation voltage (VISO) (Vrms) 2500 CMTI (min) (V/µs) 25000 Operating temperature range (°C) -55 to 125 Supply voltage (max) (V) 5.5 Supply voltage (min) (V) 3 Propagation delay time (typ) (µs) 0.017 Current consumption per channel (DC) (typ) (mA) 4.3 Creepage (min) (mm) 6 Clearance (min) (mm) 6
SOIC (D) 8 29.4 mm² 4.9 x 6
  • Controlled Baseline
    • One Assembly Site
    • One Test Site
    • One Fabrication Site
  • Extended Temperature Performance of –55°C to 125°C
  • Enhanced Diminishing Manufacturing Sources (DMS) Support
  • Enhanced Product-Change Notification
  • Qualification Pedigree(1)
  • 4000-V(peak) Isolation
    • UL 1577, IEC 60747-5-2 (VDE 0884, Rev. 2) IEC 61010-1
    • 50-kV/µs Transient Immunity Typical
  • Signaling Rate 0 Mbps to 150 Mbps
    • Low Propagation Delay
    • Low Pulse Skew (Pulse-Width Distortion)
  • Low-Power Sleep Mode
  • High Electromagnetic Immunity
  • Low Input Current Requirement
  • Failsafe Output
  • Drop-In Replacement for Most Opto and Magnetic Isolators
  • APPLICATIONS
    • Industrial Fieldbus
      • Modbus
      • Profibus
      • DeviceNet Data Buses
      • Smart Distributed Systems (SDS)
    • Computer Peripheral Interface
    • Servo Control Interface
    • Data Acquisition

(1) Component qualification in accordance with JEDEC and industry standards to ensure reliable operation over an extended temperature range. This includes, but is not limited to, Highly Accelerated Stress Test (HAST) or biased 85/85, temperature cycle, autoclave or unbiased HAST, electromigration, bond intermetallic life, and mold compound life. Such qualification testing should not be viewed as justifying use of this component beyond specified performance and environmental limits.
(2) The signaling rate of a line is the number of voltage transitions that are made per second expressed in the units bps (bits per second).
SDS is a trademark of Honeywell.
DeviceNet is a trademark of Open Devicenet Vendors Association, Inc.

  • Controlled Baseline
    • One Assembly Site
    • One Test Site
    • One Fabrication Site
  • Extended Temperature Performance of –55°C to 125°C
  • Enhanced Diminishing Manufacturing Sources (DMS) Support
  • Enhanced Product-Change Notification
  • Qualification Pedigree(1)
  • 4000-V(peak) Isolation
    • UL 1577, IEC 60747-5-2 (VDE 0884, Rev. 2) IEC 61010-1
    • 50-kV/µs Transient Immunity Typical
  • Signaling Rate 0 Mbps to 150 Mbps
    • Low Propagation Delay
    • Low Pulse Skew (Pulse-Width Distortion)
  • Low-Power Sleep Mode
  • High Electromagnetic Immunity
  • Low Input Current Requirement
  • Failsafe Output
  • Drop-In Replacement for Most Opto and Magnetic Isolators
  • APPLICATIONS
    • Industrial Fieldbus
      • Modbus
      • Profibus
      • DeviceNet Data Buses
      • Smart Distributed Systems (SDS)
    • Computer Peripheral Interface
    • Servo Control Interface
    • Data Acquisition

(1) Component qualification in accordance with JEDEC and industry standards to ensure reliable operation over an extended temperature range. This includes, but is not limited to, Highly Accelerated Stress Test (HAST) or biased 85/85, temperature cycle, autoclave or unbiased HAST, electromigration, bond intermetallic life, and mold compound life. Such qualification testing should not be viewed as justifying use of this component beyond specified performance and environmental limits.
(2) The signaling rate of a line is the number of voltage transitions that are made per second expressed in the units bps (bits per second).
SDS is a trademark of Honeywell.
DeviceNet is a trademark of Open Devicenet Vendors Association, Inc.

The ISO721, ISO721M, ISO722, and ISO722M are digital isolators with a logic input and output buffer separated by a silicon oxide (SiO2) insulation barrier. This barrier provides galvanic isolation of up to 4000 V. Used in conjunction with isolated power supplies, these devices prevent noise currents on a data bus or other circuits from entering the local ground, and interfering with or damaging sensitive circuitry.

A binary input signal is conditioned, translated to a balanced signal, then differentiated by the capacitive isolation barrier. Across the isolation barrier, a differential comparator receives the logic transition information, then sets or resets a flip-flop and the output circuit accordingly. A periodic update pulse is sent across the barrier to ensure the proper dc level of the output. If this dc-refresh pulse is not received for more than 4 µs, the input is assumed to be unpowered or not being actively driven, and the failsafe circuit drives the output to a logic high state.

The symmetry of the dielectric and capacitor within the integrated circuitry provides for close capacitive matching, and allows fast transient voltage changes between the input and output grounds without corrupting the output. The small capacitance and resulting time constant provide for fast operation with signaling rates(2) from 0 Mbps (dc) to 100 Mbps for the ISO721/ISO722, and 0 Mbps to 150 Mbps with the ISO721M/ISO722M.

These devices require two supply voltages of 3.3 V, 5 V, or any combination. All inputs are 5-V tolerant when supplied from a 3.3-V supply and all outputs are 4-mA CMOS.

The ISO721 has TTL input thresholds and a noise-filter at the input that prevents transient pulses of up to 2 ns in duration from being passed to the output of the device.

The ISO721M has CMOS VCC/2 input thresholds, but do not have the noise filter and the additional propagation delay. These features of the ISO721M also provide for reduced jitter operation.

The ISO721M is characterized for operation over the ambient temperature range of –55°C to 125°C.

The ISO721, ISO721M, ISO722, and ISO722M are digital isolators with a logic input and output buffer separated by a silicon oxide (SiO2) insulation barrier. This barrier provides galvanic isolation of up to 4000 V. Used in conjunction with isolated power supplies, these devices prevent noise currents on a data bus or other circuits from entering the local ground, and interfering with or damaging sensitive circuitry.

A binary input signal is conditioned, translated to a balanced signal, then differentiated by the capacitive isolation barrier. Across the isolation barrier, a differential comparator receives the logic transition information, then sets or resets a flip-flop and the output circuit accordingly. A periodic update pulse is sent across the barrier to ensure the proper dc level of the output. If this dc-refresh pulse is not received for more than 4 µs, the input is assumed to be unpowered or not being actively driven, and the failsafe circuit drives the output to a logic high state.

The symmetry of the dielectric and capacitor within the integrated circuitry provides for close capacitive matching, and allows fast transient voltage changes between the input and output grounds without corrupting the output. The small capacitance and resulting time constant provide for fast operation with signaling rates(2) from 0 Mbps (dc) to 100 Mbps for the ISO721/ISO722, and 0 Mbps to 150 Mbps with the ISO721M/ISO722M.

These devices require two supply voltages of 3.3 V, 5 V, or any combination. All inputs are 5-V tolerant when supplied from a 3.3-V supply and all outputs are 4-mA CMOS.

The ISO721 has TTL input thresholds and a noise-filter at the input that prevents transient pulses of up to 2 ns in duration from being passed to the output of the device.

The ISO721M has CMOS VCC/2 input thresholds, but do not have the noise filter and the additional propagation delay. These features of the ISO721M also provide for reduced jitter operation.

The ISO721M is characterized for operation over the ambient temperature range of –55°C to 125°C.

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技術資料

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種類 タイトル 最新の英語版をダウンロード 日付
* データシート 3.3-V / 5-V High-Speed Digital Isolators データシート 2008年 6月 10日
* VID ISO721M-EP VID V6208627 2016年 6月 21日
* 放射線と信頼性レポート ISO721MMDREP Reliability Report 2016年 6月 20日
アプリケーション・ノート Digital Isolator Design Guide (Rev. G) PDF | HTML 2023年 9月 13日
ホワイト・ペーパー Improve Your System Performance by Replacing Optocouplers with Digital Isolators (Rev. C) PDF | HTML 2023年 9月 7日
ホワイト・ペーパー Why are Digital Isolators Certified to Meet Electrical Equipment Standards? 2021年 11月 16日
ホワイト・ペーパー Distance Through Insulation: How Digital Isolators Meet Certification Requiremen PDF | HTML 2021年 6月 11日
EVM ユーザー ガイド (英語) Universal Digital Isolator Evaluation Module PDF | HTML 2021年 3月 4日
技術記事 How to select the right digital isolator for your design 2020年 10月 21日
技術記事 Why signal isolation matters in 48-V HEV/EV systems 2019年 11月 20日
技術記事 Staying on budget: How digital isolators are transforming field transmitters 2019年 5月 24日
技術記事 What are isolated digital inputs? 2019年 3月 8日
アプリケーション・ノート Considerations for Selecting Digital Isolators 2018年 7月 24日

設計および開発

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評価ボード

DIGI-ISO-EVM — Universal digital isolator evaluation module

DIGI-ISO-EVM は、以下の 5 種類のパッケージのいずれかに封止されている、TI のシングルチャネル、デュアルチャネル、トリプルチャネル、クワッドチャネル、または 6 チャネル・デジタル・アイソレータ・デバイスの評価に使用できる評価基板です。8 ピン NB SOIC (D)、8 ピン WB SOIC (DWV)、16 ピン WB SOIC (DW)、16 ピン ultra WB (超幅広) SOIC (DWW)、16 ピン QSOP (DBQ) の各パッケージ。この EVM (評価基板) は十分な数の Berg (...)

ユーザー・ガイド: PDF | HTML
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  • リード端子の仕上げ / ボールの原材料
  • MSL rating / リフローピーク温度
  • MTBF/FIT 推定値
  • 材料 (内容)
  • 認定試験結果
  • 継続的な信頼性モニタ試験結果

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