CY29FCT818T-MIL

활성

진단 스캔 레지스터

제품 상세 정보

Technology family FCT Operating temperature range (°C) -55 to 125 Rating Military
Technology family FCT Operating temperature range (°C) -55 to 125 Rating Military
CDIP (JT) 24 221.44 mm² 32 x 6.92
  • Function, Pinout, and Drive Compatible With FCT, F Logic, and AM29818
  • Reduced VOH (Typically = 3.3 V) Version of Equivalent FCT Functions
  • Edge-Rate Control Circuitry for Significantly Improved Noise Characteristics
  • Ioff Supports Partial-Power-Down Mode Operation
  • Matched Rise and Fall Times
  • Fully Compatible With TTL Input and Output Logic Levels
  • 8-Bit Pipeline and Shadow Register
  • ESD Protection Exceeds JESD 22
    • 2000-V Human-Body Model (A114-A)
    • 200-V Machine Model (A115-A)
    • 1000-V Charged-Device Model (C101)
  • CY29FCT818CT
    • 64-mA Output Sink Current
    • 32-mA Output Source Current
  • CY29FCT818ATDMB
    • 20-mA Output Sink Current
    • 3-mA Output Source Current
  • 3-State Outputs

  • Function, Pinout, and Drive Compatible With FCT, F Logic, and AM29818
  • Reduced VOH (Typically = 3.3 V) Version of Equivalent FCT Functions
  • Edge-Rate Control Circuitry for Significantly Improved Noise Characteristics
  • Ioff Supports Partial-Power-Down Mode Operation
  • Matched Rise and Fall Times
  • Fully Compatible With TTL Input and Output Logic Levels
  • 8-Bit Pipeline and Shadow Register
  • ESD Protection Exceeds JESD 22
    • 2000-V Human-Body Model (A114-A)
    • 200-V Machine Model (A115-A)
    • 1000-V Charged-Device Model (C101)
  • CY29FCT818CT
    • 64-mA Output Sink Current
    • 32-mA Output Source Current
  • CY29FCT818ATDMB
    • 20-mA Output Sink Current
    • 3-mA Output Source Current
  • 3-State Outputs

The CY29FCT818T contains a high-speed 8-bit general-purpose data pipeline register and a high-speed 8-bit shadow register. The general-purpose register can be used in an 8-bit-wide data path for a normal system application. The shadow register is designed for applications such as diagnostics in sequential circuits, where it is desirable to load known data at a specific location in the circuit and to read the data at that location.

The shadow register can load data from the output of the device, and can be used as a right-shift register with bit-serial input (SDI) and output (SDO), using DCLK. The data register input is multiplexed to enable loading from the shadow register or from the data input pins, using PCLK. Data can be loaded simultaneously from the shadow register to the pipeline register, and from the pipeline register to the shadow register, provided setup-time and hold-time requirements are satisfied, with respect to the two independent clock inputs.

In a typical application, the general-purpose register in this device replaces an 8-bit data register in the normal data path of a system. The shadow register is placed in an auxiliary bit-serial loop that is used for diagnostics. During diagnostic operation, data is shifted serially into the shadow register, then transferred to the general-purpose register to load a known value into the data path. To read the contents at that point in the data path, the data is transferred from the data register into the shadow register, then shifted serially in the auxiliary diagnostic loop to make it accessible to the diagnostics controller. This data then is compared with the expected value to diagnose faulty operation of the sequential circuit.

This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.

The CY29FCT818T contains a high-speed 8-bit general-purpose data pipeline register and a high-speed 8-bit shadow register. The general-purpose register can be used in an 8-bit-wide data path for a normal system application. The shadow register is designed for applications such as diagnostics in sequential circuits, where it is desirable to load known data at a specific location in the circuit and to read the data at that location.

The shadow register can load data from the output of the device, and can be used as a right-shift register with bit-serial input (SDI) and output (SDO), using DCLK. The data register input is multiplexed to enable loading from the shadow register or from the data input pins, using PCLK. Data can be loaded simultaneously from the shadow register to the pipeline register, and from the pipeline register to the shadow register, provided setup-time and hold-time requirements are satisfied, with respect to the two independent clock inputs.

In a typical application, the general-purpose register in this device replaces an 8-bit data register in the normal data path of a system. The shadow register is placed in an auxiliary bit-serial loop that is used for diagnostics. During diagnostic operation, data is shifted serially into the shadow register, then transferred to the general-purpose register to load a known value into the data path. To read the contents at that point in the data path, the data is transferred from the data register into the shadow register, then shifted serially in the auxiliary diagnostic loop to make it accessible to the diagnostics controller. This data then is compared with the expected value to diagnose faulty operation of the sequential circuit.

This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.

다운로드 스크립트와 함께 비디오 보기 동영상

기타 장치 및 데이터시트

다른 장치 변형 제품도 CY29FCT818T 제품 페이지에서 찾을 수 있습니다.

이 데이터 시트는 CY29FCT818TCY29FCT818T-MIL 모두에 적용됩니다.

기술 문서

star =TI에서 선정한 이 제품의 인기 문서
검색된 결과가 없습니다. 검색어를 지우고 다시 시도하십시오.
모두 보기8
유형 직함 날짜
* Data sheet Diagnostic Scan Register With 3-State Outputs datasheet (Rev. B) 2001/11/02
Selection guide Logic Guide (Rev. AB) 2017/06/12
Application note Understanding and Interpreting Standard-Logic Data Sheets (Rev. C) 2015/12/02
User guide LOGIC Pocket Data Book (Rev. B) 2007/01/16
Application note Semiconductor Packing Material Electrostatic Discharge (ESD) Protection 2004/07/08
Application note Selecting the Right Level Translation Solution (Rev. A) 2004/06/22
User guide CYFCT Parameter Measurement Information 2001/04/02
Selection guide Advanced Bus Interface Logic Selection Guide 2001/01/09

설계 및 개발

추가 조건 또는 필수 리소스는 사용 가능한 경우 아래 제목을 클릭하여 세부 정보 페이지를 확인하세요.

패키지 다운로드
CDIP (JT) 24 옵션 보기

주문 및 품질

포함된 정보:
  • RoHS
  • REACH
  • 디바이스 마킹
  • 납 마감/볼 재질
  • MSL 등급/피크 리플로우
  • MTBF/FIT 예측
  • 물질 성분
  • 인증 요약
  • 지속적인 신뢰성 모니터링
포함된 정보:
  • 팹 위치
  • 조립 위치

지원 및 교육

TI 엔지니어의 기술 지원을 받을 수 있는 TI E2E™ 포럼

콘텐츠는 TI 및 커뮤니티 기고자에 의해 "있는 그대로" 제공되며 TI의 사양으로 간주되지 않습니다. 사용 약관을 참조하십시오.

품질, 패키징, TI에서 주문하는 데 대한 질문이 있다면 TI 지원을 방문하세요. ​​​​​​​​​​​​​​

동영상