제품 상세 정보

Sampling rate (max) (kHz) 192 Rating Catalog Operating temperature range (°C) -40 to 85
Sampling rate (max) (kHz) 192 Rating Catalog Operating temperature range (°C) -40 to 85
TQFP (PFB) 48 81 mm² 9 x 9
  • Digital Audio Interface Transmitter (DIT)
    • Supports Sampling Rates Up to 216 kHz
    • Includes Differential Line Driver and CMOS-Buffered Outputs
  • Digital Audio Interface Receiver (DIR)
    • PLL Lock Range Includes Sampling Rates from 20 kHz to 216 kHz
    • Four Differential-Input Line Receivers and an Input Multiplexer
    • Bypass Multiplexer Routes Line Receiver Outputs to Line Driver and Buffer Outputs
    • Automatic Detection of Non-PCM Audio Streams (DTS CD/LD and IEC 61937 formats)
    • Audio CD Q-Channel Sub-Code Decoding and Data Buffer
    • Low Jitter Recovered Clock Output
  • User-Selectable Serial Host Interface: SPI™ or I2C
    • Provides Access to On-Chip Registers and Data Buffers
    • Status Registers and Interrupt Generation for Flag and Error Conditions
    • Block-Sized Data Buffers for Both Channel Status and User Data
  • Two Audio Serial Ports (Ports A and B)
    • Synchronous Serial Interface to External Signal Processors, Data Converters, and Logic
    • Slave or Master Mode Operation With Sampling Rates Up to 216 kHz
    • Supports Left-Justified, Right-Justified, and Philips I2S™ Data Formats
    • Supports Audio Data Word Lengths Up to 24 Bits
  • Four General-Purpose Digital Outputs
    • Multifunction Programmable Through Control Registers
  • Extensive Power-Down Support
    • Functional Blocks May Be Disabled Individually When Not In Use
  • Operates From 1.8-V Core and 3.3-V I/O Power Supplies
  • Small TQFP-48 Package, Compatible With the SRC4382 and SRC4392
  • Digital Audio Interface Transmitter (DIT)
    • Supports Sampling Rates Up to 216 kHz
    • Includes Differential Line Driver and CMOS-Buffered Outputs
  • Digital Audio Interface Receiver (DIR)
    • PLL Lock Range Includes Sampling Rates from 20 kHz to 216 kHz
    • Four Differential-Input Line Receivers and an Input Multiplexer
    • Bypass Multiplexer Routes Line Receiver Outputs to Line Driver and Buffer Outputs
    • Automatic Detection of Non-PCM Audio Streams (DTS CD/LD and IEC 61937 formats)
    • Audio CD Q-Channel Sub-Code Decoding and Data Buffer
    • Low Jitter Recovered Clock Output
  • User-Selectable Serial Host Interface: SPI™ or I2C
    • Provides Access to On-Chip Registers and Data Buffers
    • Status Registers and Interrupt Generation for Flag and Error Conditions
    • Block-Sized Data Buffers for Both Channel Status and User Data
  • Two Audio Serial Ports (Ports A and B)
    • Synchronous Serial Interface to External Signal Processors, Data Converters, and Logic
    • Slave or Master Mode Operation With Sampling Rates Up to 216 kHz
    • Supports Left-Justified, Right-Justified, and Philips I2S™ Data Formats
    • Supports Audio Data Word Lengths Up to 24 Bits
  • Four General-Purpose Digital Outputs
    • Multifunction Programmable Through Control Registers
  • Extensive Power-Down Support
    • Functional Blocks May Be Disabled Individually When Not In Use
  • Operates From 1.8-V Core and 3.3-V I/O Power Supplies
  • Small TQFP-48 Package, Compatible With the SRC4382 and SRC4392

The DIX4192 device is a highly-integrated CMOS device designed for use in professional and broadcast digital audio systems. The DIX4192 combines a digital audio interface receiver (DIR) and transmitter (DIT), two audio serial ports, and flexible distribution logic for interconnection of the function block data and clocks.

The DIR and DIT are compatible with the AES3, S/PDIF, IEC 60958, and EIAJ CP-1201 interface standards. The audio serial ports and DIT may be operated at sampling rates up to 216 kHz. The DIR lock range includes sampling rates from 20 kHz to 216 kHz.

The DIX4192 device is configured using on-chip control registers and data buffers, which are accessed through either a 4-wire serial peripheral interface (SPI) port, or a 2-wire Philips I2C bus interface. Status registers provide access to a variety of flag and error bits, which are derived from the various function blocks. An open-drain interrupt output pin is provided, and is supported by flexible interrupt reporting and mask options through control register settings. A master reset input pin is provided for initialization by a host processor or supervisory functions.

The DIX4192 device requires a 1.8-V core logic supply, in addition to a 3.3-V supply for powering portions of the DIR, DIT, and line driver and receiver functions. A separate logic I/O supply supports operation from 1.65 V to 3.6 V, providing compatibility with low voltage logic interfaces typically found on digital signal processors and programmable logic devices. The DIX4192 device is available in a lead-free, TQFP-48 package, and is pin- and register-compatible with the Texas Instruments SRC4382 and SRC4392 products.

The DIX4192 device is a highly-integrated CMOS device designed for use in professional and broadcast digital audio systems. The DIX4192 combines a digital audio interface receiver (DIR) and transmitter (DIT), two audio serial ports, and flexible distribution logic for interconnection of the function block data and clocks.

The DIR and DIT are compatible with the AES3, S/PDIF, IEC 60958, and EIAJ CP-1201 interface standards. The audio serial ports and DIT may be operated at sampling rates up to 216 kHz. The DIR lock range includes sampling rates from 20 kHz to 216 kHz.

The DIX4192 device is configured using on-chip control registers and data buffers, which are accessed through either a 4-wire serial peripheral interface (SPI) port, or a 2-wire Philips I2C bus interface. Status registers provide access to a variety of flag and error bits, which are derived from the various function blocks. An open-drain interrupt output pin is provided, and is supported by flexible interrupt reporting and mask options through control register settings. A master reset input pin is provided for initialization by a host processor or supervisory functions.

The DIX4192 device requires a 1.8-V core logic supply, in addition to a 3.3-V supply for powering portions of the DIR, DIT, and line driver and receiver functions. A separate logic I/O supply supports operation from 1.65 V to 3.6 V, providing compatibility with low voltage logic interfaces typically found on digital signal processors and programmable logic devices. The DIX4192 device is available in a lead-free, TQFP-48 package, and is pin- and register-compatible with the Texas Instruments SRC4382 and SRC4392 products.

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* Data sheet DIX4192 Integrated Digital Audio Interface Receiver and Transmitter datasheet (Rev. F) PDF | HTML 2016/09/19
EVM User's guide DIX4192EVM-PDK User's Guide 2006/06/16

설계 및 개발

추가 조건 또는 필수 리소스는 사용 가능한 경우 아래 제목을 클릭하여 세부 정보 페이지를 확인하세요.

평가 보드

DIX4192EVM-PDK — DIX4192 평가 모듈(EVM) 및 USB 마더보드

The DIX4192EVM-PDK provides a modular solution for evaluating the function and performance of the DIX4192 device from Texas Instruments. The PDK includes a motherboard (DAIMB) and a daughterboard (DIX4192EVM). Together, the daughter and mother boards form a modular platform for evaluating the (...)

사용 설명서: PDF
TI.com에서 구매 불가
평가 보드

TAS5634EVM — TAS5634 300W 스테레오/600W 모노 HD 디지털 입력, 58V 클래스 D 증폭기 전력계 평가 모듈

The TAS5634EVM evaluation module demonstrates the TAS5634DDV integrated circuit from Texas Instruments. The TAS5634DDV is a high-power class-D with high-efficiency class-D technology. This EVM supports two BTL (stereo 2.0) output channels, one PBTL (mono 0.1) output channel, one BTL plus two SE (...)
사용 설명서: PDF
TI.com에서 구매 불가
시뮬레이션 모델

DIX4192 IBIS Model

SBFM018.ZIP (155 KB) - IBIS Model
시뮬레이션 툴

PSPICE-FOR-TI — TI 설계 및 시뮬레이션 툴용 PSpice®

TI용 PSpice®는 아날로그 회로의 기능을 평가하는 데 사용되는 설계 및 시뮬레이션 환경입니다. 완전한 기능을 갖춘 이 설계 및 시뮬레이션 제품군은 Cadence®의 아날로그 분석 엔진을 사용합니다. 무료로 제공되는 TI용 PSpice에는 아날로그 및 전력 포트폴리오뿐 아니라 아날로그 행동 모델에 이르기까지 업계에서 가장 방대한 모델 라이브러리 중 하나가 포함되어 있습니다.

TI 설계 및 시뮬레이션 환경용 PSpice는 기본 제공 라이브러리를 이용해 복잡한 혼합 신호 설계를 시뮬레이션할 수 있습니다. 레이아웃 및 제작에 (...)
패키지 CAD 기호, 풋프린트 및 3D 모델
TQFP (PFB) 48 Ultra Librarian

주문 및 품질

포함된 정보:
  • RoHS
  • REACH
  • 디바이스 마킹
  • 납 마감/볼 재질
  • MSL 등급/피크 리플로우
  • MTBF/FIT 예측
  • 물질 성분
  • 인증 요약
  • 지속적인 신뢰성 모니터링
포함된 정보:
  • 팹 위치
  • 조립 위치

권장 제품에는 본 TI 제품과 관련된 매개 변수, 평가 모듈 또는 레퍼런스 디자인이 있을 수 있습니다.

지원 및 교육

TI 엔지니어의 기술 지원을 받을 수 있는 TI E2E™ 포럼

콘텐츠는 TI 및 커뮤니티 기고자에 의해 "있는 그대로" 제공되며 TI의 사양으로 간주되지 않습니다. 사용 약관을 참조하십시오.

품질, 패키징, TI에서 주문하는 데 대한 질문이 있다면 TI 지원을 방문하세요. ​​​​​​​​​​​​​​

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