SN54LS273-SP
- Contains Eight Flip-Flops With Single-Rail Outputs
- Buffered Clock and Direct Clear Inputs
- Individual Data Input to Each Flip-Flop
- Applications Include:
- Buffer/Storage Registers
- Shift Registers
- Pattern Generators
These monolithic, positive-edge-triggered flip-flops utilize TTL circuitry to implement D-type flip-flop logic with a direct clear input.
Information at the D inputs meeting the setup time requirements is transferred to the Q outputs on the positive-going edge of the clock pulse. Clock triggering occurs at a particular voltage level and is not directly related to the transition time of the positive-going pulse. When the clock input is at either the high or low level, the D input signal has no effect at the output.
These flip-flops are guaranteed to respond to clock frequencies ranging form 0 to 30 megahertz while maximum clock frequency is typically 40 megahertz. Typical power dissipation is 39 milliwatts per flip-flop for the ´273 and 10 milliwatts for the ´LS273.
관심 가지실만한 유사 제품
비교 대상 장치와 유사한 기능
기술 자료
유형 | 직함 | 날짜 | ||
---|---|---|---|---|
* | Data sheet | Octal D-Type Flip-Flop With Clear--SN54273, SN54LS273, SN74273, SN74LS273 datasheet | 1988/03/01 |
주문 및 품질
- RoHS
- REACH
- 디바이스 마킹
- 납 마감/볼 재질
- MSL 등급/피크 리플로우
- MTBF/FIT 예측
- 물질 성분
- 인증 요약
- 지속적인 신뢰성 모니터링
- 팹 위치
- 조립 위치