SN74CBTLV3245A-Q1
- Qualified for Automotive Applications
- AEC-Q100 Qualified With the Following Results: –
- Device Temperature Grade 1: –40°C to +125°C
- Ambient Operating Temperature Range
- Device HBM ESD Classification Level 2
- Device CDM ESD Classification Level C5
- Standard ’245-Type Pinout
- 5-Ω Switch Connection Between Two Ports
- Rail-to-Rail Switching on Data I/O Ports
- Ioff Supports Partial-Power-Down Mode Operation
- Latch-Up Performance Exceeds 250 mA Per JESD 17
- ESD Protection Exceeds JESD 22
- 2000-V Human-Body Model (A114-A)
The SN74CBTLV3245A-Q1 provides eight bits of high-speed bus switching in a standard ’245 device pinout. The low on-state resistance of the switch allows connections to be made with minimal propagation delay.
The device is organized as one 8-bit switch. When output enable (OE) is low, the 8-bit bus switch is on, and port A is connected to port B. When OE is high, the switch is open, and the high-impedance state exists between the two ports.
This device is fully specified for partial-power-down applications using Ioff. The Ioff feature maitains that damaging current does not backflow through the device when the device is powered down. The device has isolation during power off.
To maintain the high-impedance state during power up or power down, OE is tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
기술 자료
| 상위 문서 | 유형 | 직함 | 형식 옵션 | 최신 영어 버전 다운로드 | 날짜 |
|---|---|---|---|---|---|
| * | 데이터 시트 | SN74CBTLV3245A-Q1 Low-Voltage Octal FET Bus Switch datasheet | PDF | HTML | 2026. 1. 16 | |
| 기능 안전 정보 | SN74CBTLV3245A-Q1 Functional Safety FIT Rate, FMD and Pin FMA | PDF | HTML | 2026. 7. 27 |
설계 및 개발
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| 패키지 | 핀 | CAD 기호, 풋프린트 및 3D 모델 |
|---|---|---|
| VQFN (RKS) | 20 | Ultra Librarian |
주문 및 품질
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