SN74CBTLV3861

Name: SN74CBTLV3861
Brand: TI
SKU: SN74CBTLV3861
Price: 0.242 USD

활성

1개의 제어 입력을 지원하는 3.3V, 1:1(SPST), 10채널 범용 FET 버스 스위치

지금 주문

데이터시트

document-pdfAcrobat SN74CBTLV3861 datasheet (Rev. H) (영어)

SN74CBTLV3861

활성

데이터시트

지금 주문

제품 상세 정보

Configuration

1:1 SPST

Number of channels

10

Power supply voltage - single (V)

2.5, 3.3

Protocols

Analog

Ron (typ) (Ω)

5

ON-state leakage current (max) (µA)

1

Bandwidth (MHz)

200

Operating temperature range (°C)

-40 to 85

Features

Powered-off protection

Input/output continuous current (max) (mA)

128

Rating

Catalog

Drain supply voltage (max) (V)

3.6

Supply voltage (max) (V)

3.6

Configuration

1:1 SPST

Number of channels

10

Power supply voltage - single (V)

2.5, 3.3

Protocols

Analog

Ron (typ) (Ω)

5

ON-state leakage current (max) (µA)

1

Bandwidth (MHz)

200

Operating temperature range (°C)

-40 to 85

Features

Powered-off protection

Input/output continuous current (max) (mA)

128

Rating

Catalog

Drain supply voltage (max) (V)

3.6

Supply voltage (max) (V)

3.6

SOIC (DW)

24

159.65 mm² 15.5 x 10.3

SOP (NS)

24

117 mm² 15 x 7.8

SSOP (DBQ)

24

51.9 mm² 8.65 x 6

TSSOP (PW)

24

49.92 mm² 7.8 x 6.4

TVSOP (DGV)

24

32 mm² 5 x 6.4

5- Switch Connection Between Two Ports
Rail-to-Rail Switching on Data I/O Ports
I_off Supports Partial-Power-Down Mode Operation
Flow-Through Architecture Optimizes PCB Layout
Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II

5- Switch Connection Between Two Ports
Rail-to-Rail Switching on Data I/O Ports
I_off Supports Partial-Power-Down Mode Operation
Flow-Through Architecture Optimizes PCB Layout
Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II

The SN74CBTLV3861 provides ten bits of high-speed bus switching. The low on-state resistance of the switch allows connections to be made with minimal propagation delay.

The device is organized as one 10-bit bus switch. When output enable (OE\) is low, the 10-bit bus switch is on, and port A is connected to port B. When OE\ is high, the switch is open, and the high-impedance state exists between the two ports.

This device is fully specified for partial-power-down applications using I_off. The I_off feature ensures that damaging current will not backflow through the device when it is powered down. The device has isolation during power off.

To ensure the high-impedance state during power up or power down, OE\ should be tied to V_CC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.

The SN74CBTLV3861 provides ten bits of high-speed bus switching. The low on-state resistance of the switch allows connections to be made with minimal propagation delay.

The device is organized as one 10-bit bus switch. When output enable (OE\) is low, the 10-bit bus switch is on, and port A is connected to port B. When OE\ is high, the switch is open, and the high-impedance state exists between the two ports.

This device is fully specified for partial-power-down applications using I_off. The I_off feature ensures that damaging current will not backflow through the device when it is powered down. The device has isolation during power off.

To ensure the high-impedance state during power up or power down, OE\ should be tied to V_CC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.

open-in-new

기타 아날로그 스위치 및 멀티플렉서 찾기

다운로드 스크립트와 함께 비디오 보기 동영상

기술 문서

star

=TI에서 선정한 이 제품의 인기 문서

검색된 결과가 없습니다. 검색어를 지우고 다시 시도하십시오.

모두 보기18

	유형	직함		날짜
*	Data sheet	SN74CBTLV3861 datasheet (Rev. H)		2003/10/10
	Application note	Selecting the Correct Texas Instruments Signal Switch (Rev. E)	PDF \| HTML	2022/06/02
	Application note	Multiplexers and Signal Switches Glossary (Rev. B)	PDF \| HTML	2021/12/01
	Application brief	Eliminate Power Sequencing with Powered-off Protection Signal Switches (Rev. C)	PDF \| HTML	2021/01/06
	Selection guide	Little Logic Guide 2018 (Rev. G)		2018/07/06
	Selection guide	Logic Guide (Rev. AB)		2017/06/12
	Application note	How to Select Little Logic (Rev. A)		2016/07/26
	Application note	Understanding and Interpreting Standard-Logic Data Sheets (Rev. C)		2015/12/02
	User guide	LOGIC Pocket Data Book (Rev. B)		2007/01/16
	More literature	Digital Bus Switch Selection Guide (Rev. A)		2004/11/10
	Product overview	Design Summary for WCSP Little Logic (Rev. B)		2004/11/04
	Application note	Semiconductor Packing Material Electrostatic Discharge (ESD) Protection		2004/07/08
	User guide	Signal Switch Data Book (Rev. A)		2003/11/14
	Application note	Bus FET Switch Solutions for Live Insertion Applications		2003/02/07
	Application note	Texas Instruments Little Logic Application Report		2002/11/01
	Application note	TI IBIS File Creation, Validation, and Distribution Processes		2002/08/29
	More literature	Standard Linear & Logic for PCs, Servers & Motherboards		2002/06/13
	User guide	CBT (5-V) And CBTLV (3.3-V) Bus Switches Data Book (Rev. B)		1998/12/01

설계 및 개발

추가 조건 또는 필수 리소스는 사용 가능한 경우 아래 제목을 클릭하여 세부 정보 페이지를 확인하세요.

인터페이스 어댑터

LEADED-ADAPTER1 — TI의 5, 8, 10, 16 및 24핀 리드 패키지의 빠른 테스트를 위한 DIP 헤더 어댑터에 대한 표면 실장

The EVM-LEADED1 board allows for quick testing and bread boarding of TI's common leaded packages. The board has footprints to convert TI's D, DBQ, DCT,DCU, DDF, DGS, DGV, and PW surface mount packages to 100mil DIP headers.

사용 설명서: PDF