TPS537G4S
- Input voltage range: 4.5V to 17V
- Output voltage range: 0.25V to 5.5V
- PWMVID, AVSBus 1.4 and PMBus Interfaces
- Nvidia OVR16 spec compliant
- Dual output with 16 phases, flexible phase order assignment, and up to 4x native phase stacking
- Enhanced dual-edge D-CAP+ (DDCAP+) control loop to provide best-in-class transient performance with excellent dynamic current sharing
- Native trans-inductor voltage regulator (TLVR) topology support including open detect
- Optional PMBus secure device security Level 2 support from supply-chain to end-of-life protection
- Telemetry options with peak detection, time above programmable thresholds, and NVM storage
- Pin-selectable NVM configurations and PMBus address for reduced programming spins
- Individual phase current calibration and reporting
- PSI pin support for quick power state changes
- Fast phase-adding for undershoot reduction
- Fully compatible with TI power stages and power modules for high-density power delivery
- Patented AutoBalance™ phase current balancing
- Accurate, adjustable voltage positioning
- Selectable per-phase current limit
- Selectable current limit on total average current
- Analog IMON voltage output with programmable gain and offset options
- Frequency spread spectrum support
- Operating temperature from -40°C to 125°C
The TPS537G4S family of step-down controllers are high-performance, dual output multiphase controllers. with 16 phases. The controller has a high degree of programmability with support for up to eight separate pin-selectable configurations. Advanced control features such as dual-edge D-CAP+™ (DDCAP+) architecture with native TLVR support and full PID loop provide fast transient response and good current sharing minimizes output capacitance requirements and saves system cost. Controllers are fully compatible with relevant TI smart power stages. The device also provides optional phase shedding for efficiency improvements at different loads. All programmable parameters can be reported and configured by the PMBus interface and can be stored in NVM as the new default values to minimize the external component count.
기술 자료
| 상위 문서 | 유형 | 직함 | 형식 옵션 | 날짜 |
|---|---|---|---|---|
| * | Data sheet | TPS537G4S Dual-Channel DDCAP+, Step-Down, Multiphase Controller with PWMVID, AVSBus 1.4, and PMBus Interfaces datasheet | PDF | HTML | 2026/03/11 |
설계 및 개발
추가 조건 또는 필수 리소스는 사용 가능한 경우 아래 제목을 클릭하여 세부 정보 페이지를 확인하세요.
| 패키지 | 핀 | CAD 기호, 풋프린트 및 3D 모델 |
|---|---|---|
| FCLGA (ZLF) | 56 | Ultra Librarian |
주문 및 품질
- RoHS
- REACH
- 디바이스 마킹
- 납 마감/볼 재질
- MSL 등급/피크 리플로우
- MTBF/FIT 예측
- 물질 성분
- 인증 요약
- 지속적인 신뢰성 모니터링
- 팹 위치
- 조립 위치
권장 제품에는 본 TI 제품과 관련된 매개 변수, 평가 모듈 또는 레퍼런스 디자인이 있을 수 있습니다.