TXG8041-Q1
- Supports DC shifts up to ±80V
- AC Noise Rejection of 140VPP up to 1MHz
- CMTI of 250V/µs
- Low Prop Delay (<5ns) and Ch-Ch Skew (0.35ns)
- Greater than 250Mbps
- Low power consumption (0.65mA per channel at 1Mbps, 1.8V)
- Fully configurable dual-rail design allows each port to operate from 1.71V to 5.5V
- 4, 2, 1 channel devices with multiple configurations will be available
- Two device variants:
- TXG8041-Q1: 3 forward, 1 reverse
- TXG8042-Q1: 2 forward, 2 reverse
- Supports VCC disconnect feature (I/Os are forced into high-Z)
- Schmitt-trigger inputs allows for slow and noisy signals
- Inputs with integrated static pull-down resistors prevent channels from floating
- Operating temperature from –40°C to +125°C
- Latch-up performance exceeds 100mA per JESD 78, class II
- ESD protection exceeds JESD 22
- 4000V human-body model
- 500V charged-device model
- Package options provided:
- DYY (SOT-14)
- DBQ (QSOP-16)
The TXG804x-Q1 is a 4-bit, fixed direction, non-galvanic based voltage and ground-level translator that supports both logic-level shifting between 1.71V to 5.5V and ground-level shifting up to ±80V. Compared to traditional level shifters, the TXG804x-Q1 family solves the challenges of voltage translation across different ground levels. The Simplified Diagram shows a common use case where DC shift occurs between GNDA to GNDB due to parasitic resistance or capacitance.
VCCA is referenced to GNDA and VCCB is referenced to GNDB. Ax pins are referenced to VCCA logic level while Bx pins are referenced to VCCB logic levels. Both A port and B port accept voltages from 1.71V to 5.5V. This device includes two enable pins that place the respective outputs in a high-impedance state when the OE pin is connected to GND or left floating. In the event of input power or signal loss, the output is default low when OE is High (refer to ). The leakage between GNDA and GNDB is 70nA when VCC to GND is shorted.
The TXG804x-Q1 device helps improve noise immunity and power sequencing across different ground domains while providing low power consumption, latency, and channel-to-channel skew. TXG804x-Q1 supresses noise levels of 140PP up to 1MHz (Figure 7-4). This device supports multiple interfaces such as SPI, UART, GPIO, and I2S.
기술 자료
| 유형 | 직함 | 날짜 | ||
|---|---|---|---|---|
| * | Data sheet | TXG804x-Q1 4-bit , ± 80V Ground-Level Translator datasheet | PDF | HTML | 2025/05/12 |
| Technical article | 접지가 불안정하신가요? 새로운 접지 레벨 트랜스레이터로 오 프셋 문제를 해결하세요. (Rev. A) | PDF | HTML | 2025/06/05 | |
| Application brief | Not All Grounds Are 0V | PDF | HTML | 2025/05/21 | |
| Product overview | TI's Latest Ground-Level Translators | PDF | HTML | 2025/05/07 |
설계 및 개발
추가 조건 또는 필수 리소스는 사용 가능한 경우 아래 제목을 클릭하여 세부 정보 페이지를 확인하세요.
14-24-LOGIC-EVM — 14핀~24핀 D, DB, DGV, DW, DYY, NS 및 PW 패키지용 로직 제품 일반 평가 모듈
14-24-LOGIC-EVM 평가 모듈(EVM)은 14핀~24핀 D, DW, DB, NS, PW, DYY 또는 DGV 패키지에 있는 모든 로직 장치를 지원하도록 설계되었습니다.
TXG-4CH-EVM — 4채널 접지 레벨 변환기용 TXG 평가 모듈(EVM)
| 패키지 | 핀 | CAD 기호, 풋프린트 및 3D 모델 |
|---|---|---|
| SOT-23-THN (DYY) | 14 | Ultra Librarian |
| SSOP (DBQ) | 16 | Ultra Librarian |
주문 및 품질
- RoHS
- REACH
- 디바이스 마킹
- 납 마감/볼 재질
- MSL 등급/피크 리플로우
- MTBF/FIT 예측
- 물질 성분
- 인증 요약
- 지속적인 신뢰성 모니터링
- 팹 위치
- 조립 위치