CD40109B-Q1
- Qualified for Automotive Applications
- Independent of Power Supply Sequence Considerations
- VCC Can Exceed VDD
- Input Signals can Exceed Both VCC and VDD
- Up and Down Level-Shifting Capability
- Three-State Outputs With Separate Enable Controls
- Standardized Symmetrical Output Characteristics
- 100% Tested for Quiescent Current at 20 V
- Maximum Input Current:
- 1 µA at 18 V Over Full Package-Temperature Range
- 100 nA at 18 V and 25°C
- Noise Margin (Full Package-Temperature Range):
- 1 V at VCC = 5 V, VDD = 10 V
- 2 V at VCC = 10 V, VDD = 15 V
- 5-V, 10-V, and 15-V Parametric Ratings
- Meets All Requirements of JEDEC Tentative Standard No. 13B, "Standard specifications for Description of ’B’ Series CMOS Devices"
- Latch-Up Performance Meets 50 mA per JESD 78, Class I
- APPLICATIONS
- High-or-Low Level-Shifting With Three-State Outputs for Unidirectional or Bidirectional Bussing
- Isolation of Logic Subsystem Using Separate Power Supplies from Supply Sequencing, Supply Loss, and Supply Regulation Considerations
CD40109B contains four low-to-high-voltage level-shifting circuits. Each circuit will shift a low-voltage digital-logic input signal (A, B, C, D) with logical 1 = VCC and logical 0 = VSS to a high-voltage output signal (E, F, G, H) with logical 1 = VDD and logical 0 = VSS.
The RCA-CD40109, unlike other low-to-high level-shifting circuits, does not require the presence of the high-voltage supply (VDD) before the application of either the low-voltage supply (VCC) or the input signals. There are no restrictions on the sequence of application of VDD, VCC, or the input signals. In addition, with one exception there are no restrictions on the relative magnitudes of the supply voltages or input signals within the device maximum ratings, provided that the input signal swings between VSS and at least 0.7 VCC; VCC may exceed VDD, and input signals may exceed VCC and VDD. When operated in the mode VCC > VDD, the CD40109 will operate as a high-to-low level-shifter.
The CD40109 also features individual three-state output capability. A low level on any of the separately enabled three-state output controls produces a high-impedance state in the corresponding output.
您可能會感興趣的類似產品
引腳對引腳的功能與所比較的產品相同
功能相似於所比較的產品
技術文件
類型 | 標題 | 日期 | ||
---|---|---|---|---|
* | Data sheet | CD40109B-Q1 CMOS Quad Low-to-High Voltage Level Shifter datasheet (Rev. A) | 2011年 8月 24日 | |
Application brief | Leveraging TXH for High Voltage Level Shifting | PDF | HTML | 2023年 7月 28日 | |
Selection guide | Voltage Translation Buying Guide (Rev. A) | 2021年 4月 15日 | ||
Selection guide | Logic Guide (Rev. AB) | 2017年 6月 12日 | ||
Application note | Understanding and Interpreting Standard-Logic Data Sheets (Rev. C) | 2015年 12月 2日 | ||
More literature | Automotive Logic Devices Brochure | 2014年 8月 27日 | ||
User guide | LOGIC Pocket Data Book (Rev. B) | 2007年 1月 16日 | ||
Application note | Semiconductor Packing Material Electrostatic Discharge (ESD) Protection | 2004年 7月 8日 | ||
User guide | Signal Switch Data Book (Rev. A) | 2003年 11月 14日 | ||
Application note | Understanding Buffered and Unbuffered CD4xxxB Series Device Characteristics | 2001年 12月 3日 |
設計與開發
如需其他條款或必要資源,請按一下下方的任何標題以檢視詳細頁面 (如有)。
14-24-LOGIC-EVM — 適用於 14 針腳至 24 針腳 D、DB、DGV、DW、DYY、NS 和 PW 封裝的邏輯產品通用評估模組
14-24-LOGIC-EVM 評估模組 (EVM) 設計用於支援任何 14 針腳至 24 針腳 D、DW、DB、NS、PW、DYY 或 DGV 封裝的任何邏輯裝置。
封裝 | 引腳 | 下載 |
---|---|---|
SOP (NS) | 16 | 檢視選項 |
訂購與品質
- RoHS
- REACH
- 產品標記
- 鉛塗層/球物料
- MSL 等級/回焊峰值
- MTBF/FIT 估算值
- 材料內容
- 資格摘要
- 進行中可靠性監測
- 晶圓廠位置
- 組裝地點