DAC2900
- 125MSPS UPDATE RATE
- SINGLE SUPPLY: +3.3V or +5V
- HIGH SFDR: 68dB at fOUT = 20MHz
- LOW GLITCH: 2pVs
- LOW POWER: 310mW at +5V
- INTERNAL REFERENCE
- POWER-DOWN MODE: 23mW
- APPLICATIONS
- COMMUNICATIONS:
Base Stations, WLL, WLAN
Baseband I/Q Modulation - MEDICAL/TEST INSTRUMENTATION
- ARBITRARY WAVEFORM GENERATORS (ARB)
- DIRECT DIGITAL SYNTHESIS (DDS)
- COMMUNICATIONS:
The DAC2900 is a monolithic, 10-bit, dual-channel, high-speed Digital-to-Analog Converter (DAC), and is optimized to provide high dynamic performance while dissipating only 310mW on a +5V single supply.
Operating with high update rates of up to 125MSPS, the DAC2900 offers exceptional dynamic performance, and enables the generation of very-high output frequencies suitable for "Direct IF" applications. The DAC2900 has been optimized for communications applications in which separate I and Q data are processed while maintaining tight gain-and offset matching.
Each DAC has a high-impedance differential-current output, suitable for single-ended or differential analog-output configurations.
The DAC2900 combines high dynamic performance with a high throughput rate to create a cost-effective solution for a wide variety of waveform-synthesis applications:
- Pin compatibility between family members provides 10-bit (DAC2900), 12-bit (DAC2902), and 14-bit (DAC2904) resolution.
- Pin compatible to the AD9763 dual DAC.
- Gain matching is typically 0.5% of full-scale, and offset matching is specified at 0.02% max.
- The DAC2900 utilizes an advanced CMOS process; the segmented architecture minimizes output-glitch energy, and maximizes the dynamic performance.
- All digital inputs are +3.3V and +5V logic compatible. The DAC2900 has an internal reference circuit, and allows use of an external reference.
- The DAC2900 is available in a TQFP-48 package, and is specified over the extended industrial temperature range of –40°C to +85°C.
技術文件
| 類型 | 標題 | 日期 | ||
|---|---|---|---|---|
| * | Data sheet | Dual, 10-Bit ,125MSPS Digital-to-Analog Converter datasheet (Rev. C) | 2008年 9月 19日 | |
| Application note | Wideband Complementary Current Output DAC Single-Ended Interface (Rev. A) | 2015年 5月 8日 | ||
| EVM User's guide | DAC290x-EVM: Demo Board (Rev. B) | 2005年 9月 20日 |
設計與開發
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MATCHGAIN-CALC — 寬頻補償電流輸出 DAC 至 SE 介面：改善增益和合規電壓擺幅的匹配
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High-speed digital-to-analog converters (DACs) most often use a (...)
PSPICE-FOR-TI — PSpice® for TI 設計與模擬工具
| 封裝 | 針腳 | CAD 符號、佔位空間與 3D 模型 |
|---|---|---|
| TQFP (PFB) | 48 | Ultra Librarian |
訂購與品質
- RoHS
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- 進行中持續性的可靠性監測
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