DAC2904
- 125MSPS UPDATE RATE
- SINGLE SUPPLY: +3.3V or +5V
- HIGH SFDR: 78dB at fOUT = 10MHz
- LOW GLITCH: 2pV-s
- LOW POWER: 310mW
- INTERNAL REFERENCE
- POWER-DOWN MODE: 23mW
- APPLICATIONS
- COMMUNICATIONS:
- Base Stations, WLL, WLAN
- Baseband I/Q Modulation
- MEDICAL/TEST INSTRUMENTATION
- ARBITRARY WAVEFORM GENERATORS (ARB)
- DIRECT DIGITAL SYNTHESIS (DDS)
- COMMUNICATIONS:
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The DAC2904 is a monolithic, 14-bit, dual-channel, high-speed Digital-to-Analog Converter (DAC), and is optimized to provide high dynamic performance while dissipating only 310mW.
Operating with high update rates of up to 125MSPS, the DAC2904 offers exceptional dynamic performance, and enables the generation of very-high output frequencies suitable for “Direct IF” applications. The DAC2904 has been optimized for communications applications in which separate I and Q data are processed while maintaining tight-gain and offset matching.
Each DAC has a high-impedance differential-current output, suitable for single-ended or differential analog-output configurations.
The DAC2904 combines high dynamic performance with a high update rate to create a cost-effective solution for a wide variety of waveform-synthesis applications:
- Pin compatibility between family members provides 10-bit (DAC2900), 12-bit (DAC2902), and 14-bit (DAC2904) resolution.
- Pin compatible to the AD9767 dual DAC.
- Gain matching is typically 0.5% of full-scale, and offset matching is specified at 0.02% max.
- The DAC2904 utilizes an advanced CMOS process; the segmented architecture minimizes output-glitch energy, and maximizes the dynamic performance.
- All digital inputs are +3.3V and +5V logic compatible. The DAC2904 has an internal reference circuit, and allows use in a multiplying configuration.
The DAC2904 is available in a TQFP-48 package, and is specified over the extended industrial temperature range of –40°C to +85°C.
技術文件
| 類型 | 標題 | 日期 | ||
|---|---|---|---|---|
| * | Data sheet | Dual, 14-Bit, 125 MSPS Digital-to-Analog Converter datasheet (Rev. C) | 2004年 10月 14日 | |
| Application note | Wideband Complementary Current Output DAC Single-Ended Interface (Rev. A) | 2015年 5月 8日 | ||
| User guide | TSW3000 Demo Kit (Rev. B) | 2005年 11月 20日 | ||
| User guide | TSW3000 Demo Kit (Rev. A) | 2005年 9月 26日 | ||
| EVM User's guide | DAC290x-EVM: Demo Board (Rev. B) | 2005年 9月 20日 |
設計與開發
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MATCHGAIN-CALC — 寬頻補償電流輸出 DAC 至 SE 介面：改善增益和合規電壓擺幅的匹配
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High-speed digital-to-analog converters (DACs) most often use a (...)
PSPICE-FOR-TI — PSpice® for TI 設計與模擬工具
| 封裝 | 引腳 | 下載 |
|---|---|---|
| TQFP (PFB) | 48 | 檢視選項 |
訂購與品質
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