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數據轉換器
數位轉類比轉換器 (DAC)
高速 DAC (>10 MSPS)

DAC3174

現行

雙通道、14 位元、500-MSPS 數位轉類比轉換器 (DAC)

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產品規格表

DAC3174

現行
產品規格表 立即訂購

產品詳細資料

Resolution (Bits) 14 Number of DAC channels 2 Interface type DDR LVDS Sample/update rate (Msps) 500 Features Low Power Rating Catalog Interpolation 1x Power consumption (typ) (mW) 464 SFDR (dB) 82 Architecture Current Source Operating temperature range (°C) -40 to 85 Reference type Ext, Int
Resolution (Bits) 14 Number of DAC channels 2 Interface type DDR LVDS Sample/update rate (Msps) 500 Features Low Power Rating Catalog Interpolation 1x Power consumption (typ) (mW) 464 SFDR (dB) 82 Architecture Current Source Operating temperature range (°C) -40 to 85 Reference type Ext, Int
VQFN (RGC) 64 81 mm² 9 x 9
  • Dual-Channel
  • 14-Bit Resolution
  • Maximum Sample Rate: 500 MSPS
  • Pin Compatible With Dual-Channel DAC3154, DAC3164, and Single-Channel DAC3151, DAC3161, and DAC3171
  • Input Interface:
    • 14 LVDS Inputs
    • Single, 14-Bit Interface or Dual, 7-Bit Interface
    • Single or Dual DDR Data Clock
    • Internal FIFO
  • Chip-to-Chip Synchronization
  • Power Dissipation: 460 mW
  • Spectral Performance at 20 MHz IF:
    • SNR: 76 dBFS
    • SFDR: 78 dBc
  • Current-Sourcing DACs
  • Compliance Range: –0.5 V to +1 V
  • Package: 64-Pin VQFN (9 mm × 9 mm)
  • Dual-Channel
  • 14-Bit Resolution
  • Maximum Sample Rate: 500 MSPS
  • Pin Compatible With Dual-Channel DAC3154, DAC3164, and Single-Channel DAC3151, DAC3161, and DAC3171
  • Input Interface:
    • 14 LVDS Inputs
    • Single, 14-Bit Interface or Dual, 7-Bit Interface
    • Single or Dual DDR Data Clock
    • Internal FIFO
  • Chip-to-Chip Synchronization
  • Power Dissipation: 460 mW
  • Spectral Performance at 20 MHz IF:
    • SNR: 76 dBFS
    • SFDR: 78 dBc
  • Current-Sourcing DACs
  • Compliance Range: –0.5 V to +1 V
  • Package: 64-Pin VQFN (9 mm × 9 mm)

The DAC3174 is a dual-channel, 14-bit, 500-MSPS, digital-to-analog converter (DAC). The DAC3174 uses a 14-bit, low-voltage differential signaling (LVDS) digital bus, with one or two independent dual-data rate (DDR) data clocks for flexibility in providing data from different sources in each channel.

An input first-in first out block (FIFO) allows independent data and sample clocks. FIFO input and output pointers can be synchronized across multiple devices for precise signal synchronization.

The DAC outputs are current sourcing and terminate to GND with a compliance range of –0.5 V to +1 V.

The DAC3174 is pin compatible with the dual-channel, 500-MSPS, 12-bit DAC3164 and 10-bit DAC3154, and the single-channel, 500-MSPS, 14-bit DAC3171, 12-bit DAC3161, and 10-bit DAC3151.

The device is available in a 64-pin VQFN PowerPAD™ package. and is specified over the full industrial temperature range of –40°C to +85°C.

The DAC3174 is a dual-channel, 14-bit, 500-MSPS, digital-to-analog converter (DAC). The DAC3174 uses a 14-bit, low-voltage differential signaling (LVDS) digital bus, with one or two independent dual-data rate (DDR) data clocks for flexibility in providing data from different sources in each channel.

An input first-in first out block (FIFO) allows independent data and sample clocks. FIFO input and output pointers can be synchronized across multiple devices for precise signal synchronization.

The DAC outputs are current sourcing and terminate to GND with a compliance range of –0.5 V to +1 V.

The DAC3174 is pin compatible with the dual-channel, 500-MSPS, 12-bit DAC3164 and 10-bit DAC3154, and the single-channel, 500-MSPS, 14-bit DAC3171, 12-bit DAC3161, and 10-bit DAC3151.

The device is available in a 64-pin VQFN PowerPAD™ package. and is specified over the full industrial temperature range of –40°C to +85°C.
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類型 標題 日期
* Data sheet DAC3174 Dual, 14-Bit, 500-MSPS, Digital-to-Analog Converter datasheet (Rev. B) PDF | HTML 2017年 1月 25日
Application note DAC348x Device Configuration and Synchronization 2013年 2月 18日
More literature TI and Altera Ease Design Process with Compatible Evaluation Tools 2011年 4月 25日
More literature TI and Xilinx Ease Design Process with Compatible Evaluation Tools 2011年 4月 25日

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模擬型號

DAC3174 IBIS Model

SLAM184.ZIP (44 KB) - IBIS Model
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模擬型號

DAC3174 IBIS Model (Rev. A)

SLAM184A.ZIP (56 KB) - IBIS Model
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