DS125MB203
- 12.5-Gbps Dual Lane 2:1 Mux, 1:2 Switch or
Fanout - Low 390-mW Total Power (Typical)
- Advanced Signal Conditioning Features:
- Receive Equalization up to 30 dB at 6.25 GHz
- Transmit De-Emphasis up to –12 dB
- Transmit Output-Voltage Control: 600 mV to
1300 mV
- Programmable Through Pin Selection, EEPROM
or SMBus Interface - Selectable 2.5-V or 3.3-V Supply Voltage
- –40°C to +85°C Operating Temperature Range
The DS125MB203 device is a dual port 2:1 multiplexer and 1:2 switch or fan-out buffer with signal conditioning suitable for 10GE, 10G-KR (802.3ap), Fibre Channel, PCIe, Infiniband, SATA3/SAS2 and other high-speed bus applications with data rates up to 12.5 Gbps. The continuous time linear equalizer (CTLE) of the receiver provides necessary boost to compensate up to 30-inch FR-4 or 8-m cable (AWG-24) at 12.5 Gbps. This on-chip feature eliminates the need for external signal conditioners. The transmitter features a programmable amplitude voltage levels to be selectable from 600 mVp-p to 1300 mVp-p and de-emphasis of up to 12 dB.
The DS125MB203 can be configured to support PCIe, SAS/SATA, 10G-KR or other signaling protocols. When operating in 10G-KR and PCIe Gen-3 mode, the DS125MB203 transparently allows the host controller and the end point to optimize the full link and negotiate transmit equalizer coefficients. This seamless management of the link training protocol ensures system level interoperability with minimum latency.
The programmable settings can be applied through pin settings, SMBus (I2C) protocol or loaded directly from an external EEPROM. When operating in the EEPROM mode, the configuration information is automatically loaded on power up, which eliminates the need for an external microprocessor or software driver.
技術文件
| 重要文件 | 類型 | 標題 | 格式選項 | 下載最新的英文版本 | 日期 | |
|---|---|---|---|---|---|---|
| * | 資料表 | DS125MB203 Low-Power 12.5-Gbps Dual-Lane 2:1/1:2 Mux/Buffer With Equalization and De-Emphasis datasheet (Rev. C) | PDF | HTML | 2015/12/31 | ||
| 應用說明 | Extend reach with Ethernet Redrivers and Retimers for 10G-12.5G Applications (Rev. A) | 2023/1/31 | ||||
| 應用說明 | Understanding EEPROM Programming for High Speed Repeaters and Mux Buffers | 2014/10/9 |
設計與開發
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SIGCONARCHITECT-WRTE — SigCon Architect With RTE v2.0.0.8
| 封裝 | 針腳 | CAD 符號、佔位空間與 3D 模型 |
|---|---|---|
| WQFN (NJY) | 54 | Ultra Librarian |
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