LM98722
- LVDS/CMOS Outputs
- LVDS/CMOS/Crystal Clock Source with PLL
Multiplication - Integrated Flexible Spread Spectrum Clock
Generation - CDS or S/H Processing for CCD or CIS sensors
- Independent Gain/Offset Correction for Each
Channel - Automatic per-Channel Gain and Offset
Calibration - Programmable Input Clamp Voltage
- Flexible CCD/CIS Sensor Timing Generator
The LM98722 is a fully integrated, high performance 16-Bit, 45 MSPS signal processing solution for digital color copiers, scanners, and other image processing applications. High-speed signal throughput is achieved with an innovative architecture utilizing Correlated Double Sampling (CDS), typically employed with CCD arrays, or Sample and Hold (S/H) inputs (for higher speed CCD or CMOS image sensors). The signal paths utilize 8 bit Programmable Gain Amplifiers (PGA), a +/–9-Bit offset correction DAC and independently controlled Digital Black Level correction loops for each input. The PGA and offset DAC are programmed independently allowing unique values of gain and offset for each of the three analog inputs. The signals are then routed to a 45-MHz high performance analog-to-digital converter (ADC). The fully differential processing channel shows exceptional noise immunity, having a very low noise floor of –74dB. The 16-bit ADC has excellent dynamic performance making the LM98722 transparent in the image reproduction chain.
A very flexible integrated Spread Spectrum Clock Generation (SSCG) modulator is included to assist with EM compliance and reduce system costs.
技術文件
| 重要文件 | 類型 | 標題 | 格式選項 | 下載最新的英文版本 | 日期 | |
|---|---|---|---|---|---|---|
| * | 資料表 | LM98722 3 Channel, 16-Bit, 45 MSPS Analog Front End with LVDS/CMOS Output, Integrated CCD/CIS Sensor Timing Generator, and Spread Spectrum Clock Generation datasheet (Rev. B) | PDF | HTML | 2015/3/25 |
設計與開發
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| 封裝 | 針腳 | CAD 符號、佔位空間與 3D 模型 |
|---|---|---|
| TSSOP (DGG) | 56 | Ultra Librarian |