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LMK3H0102-Q1

現行

具有突破性體聲波 (BAW) 的車用 PCIe gen 7 相容、無參考時鐘產生器

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LMK3H0102-Q1

現行
產品規格表 立即訂購

產品詳細資料

Number of outputs 2 Output type LP-HCSL, LVCMOS, LVDS Output frequency (max) (MHz) 400 Core supply voltage (V) 1.8, 2.5, 3.3 Output supply voltage (V) 1.8, 2.5, 3.3 Operating temperature range (°C) -40 to 105 Features I2C, One-Time Programmable (OTP) memory, PCIe Gen 1 - 7 compliant, Pin programmable, Serial interface Rating Automotive
Number of outputs 2 Output type LP-HCSL, LVCMOS, LVDS Output frequency (max) (MHz) 400 Core supply voltage (V) 1.8, 2.5, 3.3 Output supply voltage (V) 1.8, 2.5, 3.3 Operating temperature range (°C) -40 to 105 Features I2C, One-Time Programmable (OTP) memory, PCIe Gen 1 - 7 compliant, Pin programmable, Serial interface Rating Automotive
VQFN (RGT) 16 9 mm² 3 x 3
  • AEC-Q100 Grade 2 qualified for automotive applications
  • Ambient temperature: –40°C to 105°C
  • Functional Safety-Capable:
  • Integrated BAW resonator, no need for external reference
  • Flexible frequency generation:
    • Two channel dividers: up to three unique output frequencies from 2.5MHz to 400MHz
    • LVCMOS outputs supported up to 200MHz: 1.8V, 2.5V, or 3.3V
    • Combination of AC-LVDS, DC-LVDS, LP-HCSL, and LVCMOS on OUT0 and OUT1 pins
  • Total output frequency stability: ±25ppm
  • 2 functional modes: I2C or preprogrammed OTP
  • PCIe Gen 1 to Gen 7 compliant: Common Clock with or without SSC, SRNS, and SRIS
  • Very low PCIe jitter with SSC:
    • PCIe Gen 5 Common Clock jitter: 57.5fs maximum (PCIe limit is 150fs)
    • PCIe Gen 6 Common Clock jitter: 34.5fs maximum (PCIe limit is 100fs)
    • PCIe Gen 7 Common Clock jitter: 29.6fs maximum (PCIe limit is 67fs)
  • Programmable SSC modulation depth
    • Preprogrammed: –0.1%, –0.25%, –0.3%, and –0.5% down spread at 200MHz FOD frequency
    • Register programmable: –0.1% to –3% down spread or ±0.05% to ±1.5% center spread
  • 1.8V to 3.3V supply voltage
  • Internal LDOs with –93.1dBc PSNR at 500kHz switching noise for LP-HCSL outputs
  • Output-to-output skew: <50ps
  • Fail-safe digital input pins
  • AEC-Q100 Grade 2 qualified for automotive applications
  • Ambient temperature: –40°C to 105°C
  • Functional Safety-Capable:
  • Integrated BAW resonator, no need for external reference
  • Flexible frequency generation:
    • Two channel dividers: up to three unique output frequencies from 2.5MHz to 400MHz
    • LVCMOS outputs supported up to 200MHz: 1.8V, 2.5V, or 3.3V
    • Combination of AC-LVDS, DC-LVDS, LP-HCSL, and LVCMOS on OUT0 and OUT1 pins
  • Total output frequency stability: ±25ppm
  • 2 functional modes: I2C or preprogrammed OTP
  • PCIe Gen 1 to Gen 7 compliant: Common Clock with or without SSC, SRNS, and SRIS
  • Very low PCIe jitter with SSC:
    • PCIe Gen 5 Common Clock jitter: 57.5fs maximum (PCIe limit is 150fs)
    • PCIe Gen 6 Common Clock jitter: 34.5fs maximum (PCIe limit is 100fs)
    • PCIe Gen 7 Common Clock jitter: 29.6fs maximum (PCIe limit is 67fs)
  • Programmable SSC modulation depth
    • Preprogrammed: –0.1%, –0.25%, –0.3%, and –0.5% down spread at 200MHz FOD frequency
    • Register programmable: –0.1% to –3% down spread or ±0.05% to ±1.5% center spread
  • 1.8V to 3.3V supply voltage
  • Internal LDOs with –93.1dBc PSNR at 500kHz switching noise for LP-HCSL outputs
  • Output-to-output skew: <50ps
  • Fail-safe digital input pins

The LMK3H0102-Q1 is a 2-output PCIe Gen 1 to Gen 7 compliant reference-less clock generator with Spread Spectrum Clocking (SSC) support. The part is based on TI proprietary Bulk Acoustic Wave (BAW) technology and provides ±25ppm clock outputs without any crystal or external clock reference. The device can provide two SSC clocks, two non-SSC clocks, or one SSC clock and one non-SSC clock at the same time. The device meets the full PCIe compliance from Gen 1 to Gen 7, including Common Clock with or without SSC, Separate Reference No Spread (SRNS), and Separate Reference Independent Spread (SRIS).

The device can be easily configured through either pins or I2C interface. An external DC/DC can be used to power the device. Refer to Power Supply Recommendations for detailed guidelines on power supply filtering and sourcing from DC/DC.

For OTP default settings for each LMK3H0102Txx configuration, refer to the LMK3H0102 Configuration Guide.

The LMK3H0102-Q1 is a 2-output PCIe Gen 1 to Gen 7 compliant reference-less clock generator with Spread Spectrum Clocking (SSC) support. The part is based on TI proprietary Bulk Acoustic Wave (BAW) technology and provides ±25ppm clock outputs without any crystal or external clock reference. The device can provide two SSC clocks, two non-SSC clocks, or one SSC clock and one non-SSC clock at the same time. The device meets the full PCIe compliance from Gen 1 to Gen 7, including Common Clock with or without SSC, Separate Reference No Spread (SRNS), and Separate Reference Independent Spread (SRIS).

The device can be easily configured through either pins or I2C interface. An external DC/DC can be used to power the device. Refer to Power Supply Recommendations for detailed guidelines on power supply filtering and sourcing from DC/DC.

For OTP default settings for each LMK3H0102Txx configuration, refer to the LMK3H0102 Configuration Guide.
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重要文件 類型 標題 格式選項 日期
* Data sheet LMK3H0102-Q1 Reference-Less 2-Differential or 5-Single-Ended Output PCIe Gen 1-7 Compliant Programmable BAW Clock Generator datasheet (Rev. B) PDF | HTML 2025年 10月 24日
Application note LMK3H0102-Q1 CISPR-25 and CISPR-32 EMI Report 2025年 6月 16日
Application note Clocking Selection Guide for FPD-Link III and FPD-Link IV SerDes PDF | HTML 2025年 4月 17日
Technical article 不只是石英：BAW 時脈如何重新定義 ADAS 與 IVI PDF | HTML 2025年 4月 15日
Functional safety information LMK3H0102-Q1 Functional Safety FIT Rate, FMD and Pin FMA PDF | HTML 2024年 10月 3日

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LMK3H0102EVM — LMK3H0102 評估模組

LMK3H0102 評估模組提供完整的計時平台，可評估具整合式 BAW (突破性體聲波) 型振盪器的 LMK3H0102 時鐘產生器的時鐘性能、針腳配置、軟體配置和功能。
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