產品詳細資料

Bits (#) 8 Data rate (max) (Mbps) 200 Topology Open drain, Push-Pull Direction control (typ) Auto-direction Vin (min) (V) 0.65 Vin (max) (V) 4.9 Vout (min) (V) 1.25 Vout (max) (V) 5.5 Applications GPIO, I2C, JTAG, MDIO, SDIO, SMBus, SPI, UART Features Output enable, Wettable flanks package Prop delay (ns) 2.2 Technology family LSF Supply current (max) (mA) 0.0015 Rating Automotive Operating temperature range (°C) -40 to 125
Bits (#) 8 Data rate (max) (Mbps) 200 Topology Open drain, Push-Pull Direction control (typ) Auto-direction Vin (min) (V) 0.65 Vin (max) (V) 4.9 Vout (min) (V) 1.25 Vout (max) (V) 5.5 Applications GPIO, I2C, JTAG, MDIO, SDIO, SMBus, SPI, UART Features Output enable, Wettable flanks package Prop delay (ns) 2.2 Technology family LSF Supply current (max) (mA) 0.0015 Rating Automotive Operating temperature range (°C) -40 to 125
TSSOP (PW) 20 41.6 mm² 6.5 x 6.4 VQFN (RKS) 20 11.25 mm² 4.5 x 2.5
  • AEC-Q100 qualified with the following results:
    • Device HBM ESD classification level 2000-V
    • Device CDM ESD classification level 1000-V
  • Available in wettable flank VQFN (RKS) package

  • Provides bidirectional voltage translation with no direction pin
  • Supports up to 100 MHz up translation and greater than 100 MHz down translation at ≤ 30-pF capacitive load and up to 40 MHz up or down translation at 50-pF capacitive load
  • Supports hot insertion
  • Allow bidirectional voltage level translation between
    • 0.65 V ↔ 1.8 V, 2.5 V, 3.3 V, 5 V (RKS package only)
    • 0.95 V ↔ 1.8 V, 2.5 V, 3.3 V, 5 V
    • 1.2 V ↔ 1.8 V, 2.5 V, 3.3 V, 5 V
    • 1.8 V ↔ 2.5 V, 3.3 V, 5 V
    • 2.5 V ↔ 3.3 V, 5 V
    • 3.3 V ↔ 5 V
  • Low standby current
  • 5-V tolerance I/O port to support TTL
  • Low r on provides less signal distortion
  • High-impedance I/O pins for EN = low
  • Flow-through pin-out for easy PCB trace routing
  • Latch-up performance exceeds 100 mA per JESD 17
  • –40°C to +125°C operating temperature range
  • AEC-Q100 qualified with the following results:
    • Device HBM ESD classification level 2000-V
    • Device CDM ESD classification level 1000-V
  • Available in wettable flank VQFN (RKS) package

  • Provides bidirectional voltage translation with no direction pin
  • Supports up to 100 MHz up translation and greater than 100 MHz down translation at ≤ 30-pF capacitive load and up to 40 MHz up or down translation at 50-pF capacitive load
  • Supports hot insertion
  • Allow bidirectional voltage level translation between
    • 0.65 V ↔ 1.8 V, 2.5 V, 3.3 V, 5 V (RKS package only)
    • 0.95 V ↔ 1.8 V, 2.5 V, 3.3 V, 5 V
    • 1.2 V ↔ 1.8 V, 2.5 V, 3.3 V, 5 V
    • 1.8 V ↔ 2.5 V, 3.3 V, 5 V
    • 2.5 V ↔ 3.3 V, 5 V
    • 3.3 V ↔ 5 V
  • Low standby current
  • 5-V tolerance I/O port to support TTL
  • Low r on provides less signal distortion
  • High-impedance I/O pins for EN = low
  • Flow-through pin-out for easy PCB trace routing
  • Latch-up performance exceeds 100 mA per JESD 17
  • –40°C to +125°C operating temperature range

  • Supports up to 100 MHz up translation and greater than 100 MHz down translation at ≦ 30 pF capacitive load and up to 40 MHz up and down translation at 50 pF capacitive load:
    • Allows the LSF family to support more consumer or telecom interfaces (MDIO or SDIO)
  • Bidirectional voltage translation without DIR pin:
    • Minimizes system effort to develop voltage translation for bidirectional interface (PMBus, I 2C, or SMbus)
  • 5 V tolerance on IO port and 125°C support:
    • With 5 V tolerance and 125°C support, the LSF family is flexible and compliant with TTL levels in industrial and telecom applications
  • Channel specific translation:
    • The LSF family is able to set up different voltage translation levels on each channel

  • Supports up to 100 MHz up translation and greater than 100 MHz down translation at ≦ 30 pF capacitive load and up to 40 MHz up and down translation at 50 pF capacitive load:
    • Allows the LSF family to support more consumer or telecom interfaces (MDIO or SDIO)
  • Bidirectional voltage translation without DIR pin:
    • Minimizes system effort to develop voltage translation for bidirectional interface (PMBus, I 2C, or SMbus)
  • 5 V tolerance on IO port and 125°C support:
    • With 5 V tolerance and 125°C support, the LSF family is flexible and compliant with TTL levels in industrial and telecom applications
  • Channel specific translation:
    • The LSF family is able to set up different voltage translation levels on each channel

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類型 標題 日期
* Data sheet LSF0108-Q1 Automotive 8-Channel Multi-Voltage Level Translator datasheet (Rev. H) PDF | HTML 2023年 7月 18日
Application note Schematic Checklist - A Guide to Designing with Auto-Bidirectional Translators PDF | HTML 2024年 7月 12日
Application note Understanding Transient Drive Strength vs. DC Drive Strength in Level-Shifters (Rev. A) PDF | HTML 2024年 7月 3日
Selection guide Voltage Translation Buying Guide (Rev. A) 2021年 4月 15日
Technical article How to shift your automotive design to another level PDF | HTML 2016年 8月 17日

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開發板

14-24-LOGIC-EVM — 適用於 14 針腳至 24 針腳 D、DB、DGV、DW、DYY、NS 和 PW 封裝的邏輯產品通用評估模組

14-24-LOGIC-EVM 評估模組 (EVM) 設計用於支援任何 14 針腳至 24 針腳 D、DW、DB、NS、PW、DYY 或 DGV 封裝的任何邏輯裝置。

使用指南: PDF | HTML
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開發板

LSF-EVM — 1 至 8 位元 LSF 轉換器系列評估模組

LSF 系列裝置為支援 0.95V 與 5V 電壓範圍的電平轉換器,並提供無需方向接腳的多電壓雙向轉換。

LSF-EVM 隨附 LSF0108PWR 裝置,具備與 LSF0101DRYR、LSF0102DCTR 和 LSF0204PWR 裝置相容的著陸模式。

LSF-EVM 透過減少資料傳輸速率超過 100MHz 的反射,最適合高速轉換。此外,由於提供多個連線介面,且組裝了可透過跨接器連接輕鬆連接或中斷的上拉,因此電路板設計可讓您輕鬆進行評估。

使用指南: PDF
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封裝 針腳 CAD 符號、佔位空間與 3D 模型
TSSOP (PW) 20 Ultra Librarian
VQFN (RKS) 20 Ultra Librarian

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