OPA2364

現行

雙路、5.5V、7-MHz、RRIO 運算放大器

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TLV9062 現行 雙路、5.5-V、10-MHz 運算放大器 Higher GBW (10MHz), higher slew rate (6.5V/µs), lower power (0.538mA Iq), wider supply (1.8V to 5.5V)

產品詳細資料

Number of channels 2 Total supply voltage (+5 V = 5, ±5 V = 10) (max) (V) 5.5 Total supply voltage (+5 V = 5, ±5 V = 10) (min) (V) 1.8 Rail-to-rail In, Out GBW (typ) (MHz) 7 Slew rate (typ) (V/µs) 5 Vos (offset voltage at 25°C) (max) (mV) 2.5 Iq per channel (typ) (mA) 0.65 Vn at 1 kHz (typ) (nV√Hz) 17 Rating Catalog Operating temperature range (°C) -40 to 125 Offset drift (typ) (µV/°C) 3 Features Zero Crossover Input bias current (max) (pA) 10 CMRR (typ) (dB) 90 Iout (typ) (A) 0.045 Architecture CMOS Input common mode headroom (to negative supply) (typ) (V) -0.1 Input common mode headroom (to positive supply) (typ) (V) 0.1 Output swing headroom (to negative supply) (typ) (V) 0.01 Output swing headroom (to positive supply) (typ) (V) -0.01
Number of channels 2 Total supply voltage (+5 V = 5, ±5 V = 10) (max) (V) 5.5 Total supply voltage (+5 V = 5, ±5 V = 10) (min) (V) 1.8 Rail-to-rail In, Out GBW (typ) (MHz) 7 Slew rate (typ) (V/µs) 5 Vos (offset voltage at 25°C) (max) (mV) 2.5 Iq per channel (typ) (mA) 0.65 Vn at 1 kHz (typ) (nV√Hz) 17 Rating Catalog Operating temperature range (°C) -40 to 125 Offset drift (typ) (µV/°C) 3 Features Zero Crossover Input bias current (max) (pA) 10 CMRR (typ) (dB) 90 Iout (typ) (A) 0.045 Architecture CMOS Input common mode headroom (to negative supply) (typ) (V) -0.1 Input common mode headroom (to positive supply) (typ) (V) 0.1 Output swing headroom (to negative supply) (typ) (V) 0.01 Output swing headroom (to positive supply) (typ) (V) -0.01
SOIC (D) 8 29.4 mm² 4.9 x 6 VSSOP (DGK) 8 14.7 mm² 3 x 4.9
  • 1.8-V Operation
  • MicroSIZE Packages
  • Bandwidth: 7 MHz
  • CMRR: 90 dB (Typical)
  • Slew Rate: 5 V/µs
  • Low Offset: 500 µV (Maximum)
  • Quiescent Current: 750 µA/Channel (Maximum)
  • Shutdown Mode: Less Than 1 µA/Channel
  • 1.8-V Operation
  • MicroSIZE Packages
  • Bandwidth: 7 MHz
  • CMRR: 90 dB (Typical)
  • Slew Rate: 5 V/µs
  • Low Offset: 500 µV (Maximum)
  • Quiescent Current: 750 µA/Channel (Maximum)
  • Shutdown Mode: Less Than 1 µA/Channel

The OPA363 and OPA364 families are high-performance, CMOS operational amplifiers optimized for very low voltage, single-supply operation. These miniature, low-cost amplifiers are designed to operate on single supplies from 1.8 V (±0.9 V) to 5.5 V
(±2.75 V). Applications include sensor amplification and signal conditioning in battery-powered systems.

The OPA363 and OPA364 families offer excellent CMRR without the crossover associated with traditional complimentary input stages. This feature results in excellent performance for driving analog-to-digital (A/D) converters without degradation of differential linearity and THD. The input common-mode range includes both the negative and positive supplies. The output voltage swing is within 10 mV of the rails.

The OPA363 family includes a shutdown mode. Under logic control, the amplifiers can be switched from normal operation to a standby current that is less than 1 µA.

The single version is available in the MicroSize 5-pin SOT-23 (6-pin SOT-23 for shutdown) and 8-pin SOIC. The dual version is available in 8-pin VSSOP, 10-pin VSSOP, 16-pin UQFN, and 8-pin SOIC packages. Quad packages are available in 14-pin TSSOP and 14-pin SOIC packages. All versions are specified for operation from –40°C to +125°C.

The OPA363 and OPA364 families are high-performance, CMOS operational amplifiers optimized for very low voltage, single-supply operation. These miniature, low-cost amplifiers are designed to operate on single supplies from 1.8 V (±0.9 V) to 5.5 V
(±2.75 V). Applications include sensor amplification and signal conditioning in battery-powered systems.

The OPA363 and OPA364 families offer excellent CMRR without the crossover associated with traditional complimentary input stages. This feature results in excellent performance for driving analog-to-digital (A/D) converters without degradation of differential linearity and THD. The input common-mode range includes both the negative and positive supplies. The output voltage swing is within 10 mV of the rails.

The OPA363 family includes a shutdown mode. Under logic control, the amplifiers can be switched from normal operation to a standby current that is less than 1 µA.

The single version is available in the MicroSize 5-pin SOT-23 (6-pin SOT-23 for shutdown) and 8-pin SOIC. The dual version is available in 8-pin VSSOP, 10-pin VSSOP, 16-pin UQFN, and 8-pin SOIC packages. Quad packages are available in 14-pin TSSOP and 14-pin SOIC packages. All versions are specified for operation from –40°C to +125°C.

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技術文件

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重要文件 類型 標題 格式選項 日期
* Data sheet OPAx363, OPAx364 1.8-V, 7-MHz, 90-dB CMRR, Single-Supply, Rail-to-Rail I/O Operational Amplifier datasheet (Rev. F) PDF | HTML 2018年 5月 21日
E-book An Engineer’s Guide to Designing with Precision Amplifiers 2021年 4月 29日
E-book The Signal e-book: A compendium of blog posts on op amp design topics 2017年 3月 28日
Application note High-Voltage Signal Conditioning for Differential ADCs 2004年 6月 14日

設計與開發

如需其他條款或必要資源,請按一下下方的任何標題以檢視詳細頁面 (如有)。

開發板

AMP-PDK-EVM — 放大器性能開發套件評估模組

放大器性能開發套件 (PDK) 是一款評估模組 (EVM) 套件,可測試通用運算放大器 (op amp) 參數,並與大多數運算放大器和比較器相容。EVM 套件提供主板和多個插槽式子卡選項,可滿足封裝需求,使工程師能夠快速評估和驗證裝置性能。

AMP-PDK-EVM 套件支援五種最熱門的業界標準封裝,包括:

  • D (SOIC-8 和 SOIC-14)
  • PW (TSSOP-14)
  • DGK (VSSOP-8)
  • DBV (SOT23-5 和 SOT23-6)
  • DCK (SC70-5 和 SC70-6)
使用指南: PDF | HTML
開發板

DIP-ADAPTER-EVM — DIP 轉接器評估模組

Speed up your op amp prototyping and testing with the DIP-Adapter-EVM, which provides a fast, easy and inexpensive way to interface with small, surface-mount ICs. You can connect any supported op amp using the included Samtec terminal strips or wire them directly to existing circuits.

The (...)

使用指南: PDF
TI.com 無法提供
開發板

DUAL-DIYAMP-EVM — 雙通道通用自製 (DIY) 放大器電路評估模組

DUAL-DIYAMP-EVM 是一系列評估模組 (EVM),提供工程師與自組愛好者 (DIYer) 實作型放大器電路,協助快速評估設計概念並驗證模擬結果。其是專為採用業界標準 SOIC-8 封裝的雙封裝運算放大器而設計。其可實現反向及非反向放大器、Sallen key 濾波器、多回饋濾波器、含參考緩衝器的差動放大器、含雙回饋的 Riso、單端輸入至差動輸出、差動輸入至差動輸出、雙運算放大器儀器放大器和並聯運算放大器。

DUAL-DIYAMP-EVM 可快速製作電路原型,並採用常見的 0805 或 0603 表面裝載元件。透過多種組合方式,此 EVM (...)

使用指南: PDF
TI.com 無法提供
模擬型號

OPA364 PSpice Model (Rev. A)

SBOC025A.ZIP (4 KB) - PSpice Model
模擬型號

OPA364 TINA-TI Reference Design (Rev. A)

SBOC208A.TSC (59 KB) - TINA-TI Reference Design
模擬型號

OPA364 TINA-TI Spice Model

SBOM286.TSM (6 KB) - TINA-TI Spice Model
計算工具

ANALOG-ENGINEER-CALC PC software analog engineer's calculator

The analog engineer’s calculator is designed to speed up many of the repetitive calculations that analog circuit design engineers use on a regular basis. This PC-based tool provides a graphical interface with a list of various common calculations ranging from setting operational-amplifier (...)

支援產品和硬體

支援產品和硬體

設計工具

CIRCUIT060013 — 具有 T 網路回饋電路的反相放大器

此設計可反轉輸入訊號 VIN,並使用 1000 V/V 或 60 dB 訊號增益。具有 T 回饋網路的反相放大器可在沒有較小 R4 值或超大回饋電阻器值的情況下獲得高增益。
設計工具

CIRCUIT060015 — 可調式參考電壓電路

此電路結合反相及非反相放大器,讓參考電壓可從負輸入電壓向上調整至輸入電壓。可加入增益以提高最大負參考位準。
設計工具

CIRCUIT060074 — 具有比較器電路的高壓側電流感測

此高壓側電流感測解決方案使用一個具有軌對軌輸入共模範圍的比較器,若負載電流上升到 1 A 以上,便在比較器輸出 (COMP OUT) 建立過電流警示 (OC 警示) 訊號。此實作中的 OC 訊號為低電位作動。因此當超過 1-A 閾值時,比較器輸出會變低。實作磁滯後會在負載電流降低至 0.5 A (減少 50%) 時,讓 OC-Alert 返回邏輯高狀態。此電路利用開漏輸出比較器,為控制數位邏輯輸入針腳而進行電平轉換輸出高邏輯電平。對於需要驅動 MOSFET 開關閘極的應用,建議使用具推挽輸出的比較器。
模擬工具

PSPICE-FOR-TI — PSpice® for TI 設計與模擬工具

PSpice® for TI 是有助於評估類比電路功能的設計和模擬環境。這款全功能設計和模擬套件使用 Cadence® 的類比分析引擎。PSpice for TI 包括業界最大的模型庫之一,涵蓋我們的類比和電源產品組合,以及特定類比行為模型,且使用無需支付費用。

PSpice for TI 設計和模擬環境可讓您使用其內建函式庫來模擬複雜的混合訊號設計。在進行佈局和製造之前,建立完整的終端設備設計和解決方案原型,進而縮短上市時間並降低開發成本。 

在 PSpice for TI 設計與模擬工具中,您可以搜尋 TI (...)
模擬工具

TINA-TI — 基於 SPICE 的類比模擬程式

TINA-TI provides all the conventional DC, transient and frequency domain analysis of SPICE and much more. TINA has extensive post-processing capability that allows you to format results the way you want them. Virtual instruments allow you to select input waveforms and probe circuit nodes voltages (...)
使用指南: PDF
封裝 針腳 CAD 符號、佔位空間與 3D 模型
SOIC (D) 8 Ultra Librarian
VSSOP (DGK) 8 Ultra Librarian

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  • 鉛塗層/球物料
  • MSL 等級/回焊峰值
  • MTBF/FIT 估算值
  • 材料內容
  • 認證摘要
  • 進行中的可靠性監測
內含資訊:
  • 晶圓廠位置
  • 組裝地點

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