SN74AUP1G57
- Available in the Texas Instruments NanoStar™
Packages - Low Static-Power Consumption
(ICC = 0.9 µA Maximum) - Low Dynamic-Power Consumption
(Cpd = 4.3 pF Typical at 3.3 V) - Low Input Capacitance (Ci = 1.5 pF Typical)
- Low Noise – Overshoot and Undershoot
<10% of VCC - Ioff Supports Partial-Power-Down Mode Operation
- Includes Schmitt-Trigger Inputs
- Wide Operating VCC Range of 0.8 V to 3.6 V
- Optimized for 3.3-V Operation
- 3.6-V I/O Tolerant to Support Mixed-Mode Signal
Operation - tpd = 5.3 ns Maximum at 3.3 V
- Suitable for Point-to-Point Applications
- Latch-Up Performance Exceeds 100 mA Per
JESD 78, Class II - ESD Performance Tested Per JESD 22
- 2000-V Human-Body Model
(A114-B, Class II) - 1000-V Charged-Device Model (C101)
- 2000-V Human-Body Model
- APPLICATIONS
- Active Noise Cancellation (ANC)
- Barcode Scanners
- Blood Pressure Monitors
- CPAP Machines
- Cable Solutions
- E-Books
- Embedded PCs
- Field Transmitter: Temperature or Pressure
Sensors - HVAC: Heating, Ventilating, and Air Conditioning
- Network-Attached Storage (NAS)
- Server Motherboard and PSU
- Software Defined Radio (SDR)
- TV: High-Definition (HDTV), LCD, and Digital
- Video Communications Systems
All other trademarks are the property of their respective owners
The SN74AUP1G57 device features configurable multiple functions. The output state is determined by eight patterns of 3-bit input. The user can choose the logic functions AND, OR, NAND, NOR, XNOR, inverter, and noninverter. All inputs can be connected to VCC or GND.
您可能會感興趣的類似產品
引腳對引腳且具備與所比較裝置相同的功能
技術文件
找不到結果。請清除您的搜尋條件,然後再試一次。
檢視所有 7 類型 | 標題 | 日期 | ||
---|---|---|---|---|
* | Data sheet | SN74AUP1G57 Low-Power Configurable Multiple-Function Gate datasheet (Rev. J) | PDF | HTML | 2015年 6月 22日 |
Application brief | Utilizing Configurable Logic in System Design | PDF | HTML | 2024年 10月 30日 | |
Application brief | Understanding Schmitt Triggers (Rev. A) | PDF | HTML | 2019年 5月 22日 | |
Selection guide | Little Logic Guide 2018 (Rev. G) | 2018年 7月 6日 | ||
Selection guide | Logic Guide (Rev. AB) | 2017年 6月 12日 | ||
Application note | How to Select Little Logic (Rev. A) | 2016年 7月 26日 | ||
Application note | Semiconductor Packing Material Electrostatic Discharge (ESD) Protection | 2004年 7月 8日 |
設計與開發
如需其他條款或必要資源,請按一下下方的任何標題以檢視詳細頁面 (如有)。
開發板
5-8-LOGIC-EVM — 適用於 5 針腳至 8 針腳 DCK、DCT、DCU、DRL 和 DBV 封裝的通用邏輯評估模組
靈活的 EVM 旨在支援任何針腳數為 5 至 8 支且採用 DCK、DCT、DCU、DRL 或 DBV 封裝的裝置。
使用指南: PDF
封裝 | 針腳 | CAD 符號、佔位空間與 3D 模型 |
---|---|---|
DSBGA (YZP) | 6 | Ultra Librarian |
SOT-23 (DBV) | 6 | Ultra Librarian |
SOT-5X3 (DRL) | 6 | Ultra Librarian |
SOT-SC70 (DCK) | 6 | Ultra Librarian |
USON (DRY) | 6 | Ultra Librarian |
X2SON (DSF) | 6 | Ultra Librarian |
訂購與品質
內含資訊:
- RoHS
- REACH
- 產品標記
- 鉛塗層/球物料
- MSL 等級/回焊峰值
- MTBF/FIT 估算值
- 材料內容
- 認證摘要
- 進行中持續性的可靠性監測
內含資訊:
- 晶圓廠位置
- 組裝地點