SN74LS31
- Delay Elements for Generating Delay Lines
- Inverting and Non-inverting Elements
- Buffer NAND Elements Rated at IOL of 12/24 mA
- PNP Inputs Reduce Fan-In (IIL = -0.2 mA MAX)
- Worst Case MIN/MAX Delays Guaranteed Across Temperature and VCC Ranges
These 'LS31 delay elements are intended to provide well-defined delays across both temperature and VCC ranges. Used in cascade, a limitless range of delay gating is possible.
All inputs are PNP with IIL MAX of -0.2 mA. Gates 1, 2, 5, and 6 have standard Low-Power Schottky output sink current capability of 4 and 8 mA IOL. Buffers 3 and 4 are rated at 12 and 24 mA.
The SN54LS31 is characterized for operation over the full military temperature range of -55°C to 125°C. The SN74LS31 is characterized for operation from 0°C to 70°C.
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檢視所有 1 類型 | 標題 | 日期 | ||
---|---|---|---|---|
* | Data sheet | Delay Elements datasheet | 1988年 3月 1日 |
訂購與品質
內含資訊:
- RoHS
- REACH
- 產品標記
- 鉛塗層/球物料
- MSL 等級/回焊峰值
- MTBF/FIT 估算值
- 材料內容
- 認證摘要
- 進行中持續性的可靠性監測
內含資訊:
- 晶圓廠位置
- 組裝地點