SN74LVC8T245-Q1
- AEC-Q100 qualified for automotive applications
- Fully configurable dual-rail design allows each port to operate over the full 1.65V to 5.5V power-supply range
- Robust, glitch-free power supply sequencing
- Control inputs VIH/VIL levels are referenced to VCCA voltage
- VCC isolation feature and
VCC disconnect feature
- if either VCC input is below 100mV or left floating, all I/O outputs are disabled and become high- impedance state
- Ioff supports partial-power-down mode operation
- Latch-up performance exceeds 100mA per JESD 78, class II
- Operating temperature from -40°C to 125°C
- ESD protection exceeds JESD 22
- 4000V Human-Body Model (A114-A)
- 1000V Charged-Device Model (C101)
The SN74LVC8T245-Q1 is an eight bit non-inverting bus transceiver with configurable dual power supply rails that enables bidirectional voltage level translation. The SN74LVC8T245-Q1 is optimized to operate with VCCA and VCCB set at 1.65V to 5.5V. The A port is designed to track VCCA. VCCA accepts any supply voltage from 1.65V to 5.5V. The B port is designed to track VCCB. VCCB accepts any supply voltage from 1.65V to 5.5V. This allows for universal low-voltage bidirectional translation between any of the 1.8V, 2.5V, 3.3V, and 5.5V voltage nodes.
The SN74LVC8T245-Q1 is designed for asynchronous communication between two data buses. The logic levels of the direction-control (DIR) input and the output-enable (OE) input activate either the B-port outputs or the A-port outputs or place both output ports into the high-impedance mode. The device transmits data from the A bus to the B bus when the B-port outputs are activated, and from the B bus to the A bus when the A-port outputs are activated.
The input circuitry on both A and B ports is always active and must have a logic HIGH or LOW level applied to prevent excess ICC and ICCZ.
This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down. The VCC isolation feature is designed so that if either VCC input is at GND, then all outputs are in the high-impedance state. To put the device in the high-impedance state during power up or power down, tie OE to VCC through a pullup resistor; the current-sinking capability of the driver determines the minimum value of the resistor.
The SN74LVC8T245-Q1 is designed so that the control pins (DIR and OE) are supplied by VCCA.
技術文件
| 重要文件 | 類型 | 標題 | 格式選項 | 下載最新的英文版本 | 日期 | |
|---|---|---|---|---|---|---|
| * | 資料表 | SN74LVC8T245-Q1 Automotive 8-Bit Dual-Supply Bus Transceiver With Configurable Voltage Translation and 3-State Outputs datasheet (Rev. B) | PDF | HTML | 2026/5/29 | ||
| 應用說明 | Schematic Checklist - A Guide to Designing With Fixed or Direction Control Translators | PDF | HTML | 2024/10/2 | |||
| 應用說明 | Schematic Checklist - A Guide to Designing with Auto-Bidirectional Translators | PDF | HTML | 2024/7/12 | |||
| 應用說明 | Understanding Transient Drive Strength vs. DC Drive Strength in Level-Shifters (Rev. A) | PDF | HTML | 2024/7/3 | |||
| 選擇指南 | Voltage Translation Buying Guide (Rev. A) | 2021/4/15 | ||||
| 更多文件說明 | Automotive Logic Devices Brochure | 2014/8/27 |
設計與開發
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14-24-LOGIC-EVM — 適用於 14 針腳至 24 針腳 D、DB、DGV、DW、DYY、NS 和 PW 封裝的邏輯產品通用評估模組
14-24-LOGIC-EVM 評估模組 (EVM) 設計用於支援任何 14 針腳至 24 針腳 D、DW、DB、NS、PW、DYY 或 DGV 封裝的任何邏輯裝置。
AVCLVCDIRCNTRL-EVM — 適用於方向控制雙向轉換裝置、支援 AVC 和 LVC 的通用 EVM
通用 EVM 的設計可支援一、二、四、八通道 LVC 及 AVC 方向控制的轉換裝置。此外也支援相同通道數量的匯流排保留與汽車 -Q1 裝置。AVC 是低電壓轉換裝置，具較低驅動強度 12mA。LVC 是較高的電壓轉換裝置，範圍從 1.65 到 5.5V 且具較高驅動強度 32mA。
TXV0106-EVM — TXV0106 評估模組
TXV0108-EVM — TXV0108 評估模組
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|---|---|---|
| TSSOP (PW) | 24 | Ultra Librarian |