TAC5301-Q1
- AEC-Q100 qualified for automotive applications
- Temperature grade 1: –40°C ≤ TA ≤ +125°C
- Mono audio ADC channel
- Performance:
- Line/Microphone differential input dynamic range: 100dB
- Differential input THD+N: –87dB
- Input voltage:
- Differential, 2VRMS full-scale input
- Single-ended, 1VRMS full-scale input
- ADC sample rates (fS) = 8kHz to 192kHz
- Programmable microphone bias (3V to 10V):
- With external high voltage HVDD supply
- Performance:
- Mono differential or Stereo single-ended audio DAC
- Performance:
- DAC to differential line-out dynamic range: 110dB
- DAC to differential headphone-out dynamic range: 109dB
- THD+N: –101dB
- Line-out/Headphone output voltage:
- Differential, 2VRMS full-scale
- Psuedo-differential, 1VRMS full-scale
- Single-ended, 1VRMS full-scale
- DAC sample rates (fs) = 8kHz to 192kHz
- Performance:
- Common Features
- Voice activity detection
- Ultrasonic activity detection
- Battery and thermal foldback protection
- Signal distortion limiter
- Low and Ultra-low latency filter options
- Programmable HPF and Biquad filters
- I2C control interface
- Audio serial interface
- Format: TDM, I2S or Left-justified (LJ)
- Word Length: 16, 20, 24 or 32 bits
- Bus controller and target modes
- Programmable PLL for flexible clocking
- Auto clock and sample rate detection
- Low Power Modes
- Single supply operation AVDD: 3.3V
- I/O supply operation: 1.2V, 1.8V or 3.3V
The TAC5301-Q1 is an automotive, low-power mono audio codec with 2VRMS differential input, 100dB dynamic range ADC and a DAC with 2VRMS differential output, 110dB dynamic range mono channel or 1VRMS single-ended output, 107dB dynamic range stereo channels. The TAC5301-Q1 supports both differential and single-ended inputs and outputs. The ADC supports both line/microphone input signals with options for AC or DC coupling configurations. The DAC outputs can be configured for either line-output or headphone loads. The DAC can drive up to 62.5mW into a 16Ω headphone load. Further, the device has the capability to directly use an external high-voltage supply (HVDD), which is any readily available supply in the system to generate a high-voltage, programmable microphone bias. The TAC5301-Q1 integrates programmable channel gain, digital volume control, a low-jitter phase-locked loop (PLL), a programmable high-pass filter (HPF), programmable EQ and biquad filters, low-latency and ultra low-latency filter modes and supports sample rates up to 192kHz for both the ADC and DAC signal chains. The TAC5301-Q1 supports time-division multiplexing (TDM), I2S, or left-justified (LJ) audio formats, and can be controlled with I2C. These integrated high-performance features, along with a single, 3.3V supply operation, make TAC5301-Q1 an excellent choice for space-constrained automotive systems.
技術文件
| 類型 | 標題 | 日期 | ||
|---|---|---|---|---|
| * | Data sheet | TAC5301-Q1 Automotive mono audio codec with 101dB ADC, 110dB DAC and programmable high-voltage micbias datasheet | PDF | HTML | 2025年 4月 28日 |
| Application brief | TAC5x1x and TAC5x1x-Q1 Programmable Biquad Filters - Configuration and Applications | PDF | HTML | 2024年 9月 27日 | |
| Application note | Clocking Configuration of Device and Flexible Clocking For TAx5x1x Family (Rev. A) | PDF | HTML | 2024年 9月 5日 | |
| Application note | Inter Chip Limiter Alignment in TAx5xxx-Q1 Devices | PDF | HTML | 2024年 8月 29日 | |
| Application note | Dynamic Voltage and Temperature Tracking Based Limiter in TAX5XXX-Q1 | PDF | HTML | 2024年 8月 20日 | |
| Application note | Clock Error Configuration, Detection, and Modes Supported in TAx5x1x Family | PDF | HTML | 2023年 11月 7日 | |
| Application note | Analog Input Configurations, Mixing and Muxing of TAx5x1x-Q1 Devices | PDF | HTML | 2023年 10月 30日 |
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TAC5X1X-Q1-SW — TAx5x1x-Q1 files. Requires PUREPATHCONSOLE installed.
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| 封裝 | 針腳 | CAD 符號、佔位空間與 3D 模型 |
|---|---|---|
| VQFN (RGE) | 24 | Ultra Librarian |
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