首頁 微控制器 (MCU) 與處理器 微處理器和 DSP 汽車駕駛輔助 SoC
首頁
微控制器 (MCU) 與處理器
微處理器和 DSP
汽車駕駛輔助 SoC

TDA2EG-17

現行

適用 ADAS 應用且具圖形與視訊加速的 SoC 處理器 (17mm 封裝)

立即訂購
產品規格表
使用指南

TDA2EG-17

現行
產品規格表 立即訂購

產品詳細資料

CPU 1 Arm Cortex-A15 Frequency (MHz) 500, 800 Coprocessors 4 Arm Cortex-M4 Graphics acceleration 1 2D, 1 3D Display type 1 HDMI, 2 LCD Protocols Ethernet PCIe 2 PCIe Gen 3 Hardware accelerators Image video accelerator Features Vision Analytics Operating system Android, Linux, RTOS Security Cryptographic acceleration, Device attestation & anti-counterfeit, Hardware-enforced isolation, Secure boot, Secure debug, Secure storage, Software IP protection Rating Automotive Operating temperature range (°C) -40 to 125 Edge AI enabled No
CPU 1 Arm Cortex-A15 Frequency (MHz) 500, 800 Coprocessors 4 Arm Cortex-M4 Graphics acceleration 1 2D, 1 3D Display type 1 HDMI, 2 LCD Protocols Ethernet PCIe 2 PCIe Gen 3 Hardware accelerators Image video accelerator Features Vision Analytics Operating system Android, Linux, RTOS Security Cryptographic acceleration, Device attestation & anti-counterfeit, Hardware-enforced isolation, Secure boot, Secure debug, Secure storage, Software IP protection Rating Automotive Operating temperature range (°C) -40 to 125 Edge AI enabled No
FCCSP (CBD) 538 289 mm² (17 mm × 17 mm)
  • Architecture designed for ADAS applications
  • Video, image, and graphics processing support
    • Full-HD video (1920 × 1080p, 60 fps)
    • Multiple video input and video output
  • Arm® Cortex®-A15 microprocessor subsystem
  • C66x floating-point VLIW DSP
    • Fully object-code compatible with C67x and C64x+
    • Up to thirty-two 16 × 16-bit fixed-point multiplies per cycle
  • Up to 512KB of on-chip L3 RAM
  • Level 3 (L3) and Level 4 (L4) interconnects
  • DDR3/DDR3L Memory Interface (EMIF) module
    • Supports up to DDR-1333 (667 MHz)
    • Up to 2GB across single chip select
  • Dual Arm® Cortex®-M4 Image Processing Units (IPU)
  • IVA-HD subsystem
  • Display subsystem
    • Display controller With DMA engine and up to three pipelines
    • HDMI™ encoder: HDMI 1.4a and DVI 1.0 compliant
  • Single-core PowerVR™ SGX544 3D GPU
  • 2D-graphics accelerator (BB2D) subsystem
    • Vivante® GC320 core
  • Video Processing Engine (VPE)
  • One Video Input Port (VIP) module
    • Support for up to four multiplexed input ports
  • General-Purpose Memory Controller (GPMC)
  • Enhanced Direct Memory Access (EDMA) controller
  • 2-port gigabit ethernet (GMAC)
    • Up to two external ports
  • Sixteen 32-bit general-purpose timers
  • 32-Bit MPU watchdog timer
  • Six high-speed inter-integrated circuit (I2C) ports
  • Ten configurable UART/IrDA/CIR modules
  • Four Multichannel Serial Peripheral Interfaces (McSPI)
  • Quad SPI Interface (QSPI)
  • Eight Multichannel Audio Serial Port (McASP) modules
  • SuperSpeed USB 3.0 dual-role device
  • High-speed USB 2.0 dual-role device
  • High-speed USB 2.0 on-the-go
  • Four MultiMedia Card/Secure Digital/Secure Digital Input Output Interfaces (MMC™/SD®/SDIO)
  • PCI Express® 3.0 port with integrated PHY
    • One 2-lane Gen2-compliant port
    • or Two 1-lane Gen2-compliant ports
  • Dual Controller Area Network (DCAN) modules
    • CAN 2.0B protocol
  • MIPI® CSI-2 camera serial interface
  • Up to 186 General-Purpose I/O (GPIO) pins
  • Device security features
    • Hardware crypto accelerators and DMA
    • Firewalls
    • JTAG lock
    • Secure keys
    • Secure ROM and boot
    • Customer programmable keys
  • Power, reset, and clock management
  • On-chip debug with CTools technology
  • 28-nm CMOS technology
  • 17 mm × 17 mm, 0.65-mm pitch, 538-pin BGA (CBD)
  • Architecture designed for ADAS applications
  • Video, image, and graphics processing support
    • Full-HD video (1920 × 1080p, 60 fps)
    • Multiple video input and video output
  • Arm® Cortex®-A15 microprocessor subsystem
  • C66x floating-point VLIW DSP
    • Fully object-code compatible with C67x and C64x+
    • Up to thirty-two 16 × 16-bit fixed-point multiplies per cycle
  • Up to 512KB of on-chip L3 RAM
  • Level 3 (L3) and Level 4 (L4) interconnects
  • DDR3/DDR3L Memory Interface (EMIF) module
    • Supports up to DDR-1333 (667 MHz)
    • Up to 2GB across single chip select
  • Dual Arm® Cortex®-M4 Image Processing Units (IPU)
  • IVA-HD subsystem
  • Display subsystem
    • Display controller With DMA engine and up to three pipelines
    • HDMI™ encoder: HDMI 1.4a and DVI 1.0 compliant
  • Single-core PowerVR™ SGX544 3D GPU
  • 2D-graphics accelerator (BB2D) subsystem
    • Vivante® GC320 core
  • Video Processing Engine (VPE)
  • One Video Input Port (VIP) module
    • Support for up to four multiplexed input ports
  • General-Purpose Memory Controller (GPMC)
  • Enhanced Direct Memory Access (EDMA) controller
  • 2-port gigabit ethernet (GMAC)
    • Up to two external ports
  • Sixteen 32-bit general-purpose timers
  • 32-Bit MPU watchdog timer
  • Six high-speed inter-integrated circuit (I2C) ports
  • Ten configurable UART/IrDA/CIR modules
  • Four Multichannel Serial Peripheral Interfaces (McSPI)
  • Quad SPI Interface (QSPI)
  • Eight Multichannel Audio Serial Port (McASP) modules
  • SuperSpeed USB 3.0 dual-role device
  • High-speed USB 2.0 dual-role device
  • High-speed USB 2.0 on-the-go
  • Four MultiMedia Card/Secure Digital/Secure Digital Input Output Interfaces (MMC™/SD®/SDIO)
  • PCI Express® 3.0 port with integrated PHY
    • One 2-lane Gen2-compliant port
    • or Two 1-lane Gen2-compliant ports
  • Dual Controller Area Network (DCAN) modules
    • CAN 2.0B protocol
  • MIPI® CSI-2 camera serial interface
  • Up to 186 General-Purpose I/O (GPIO) pins
  • Device security features
    • Hardware crypto accelerators and DMA
    • Firewalls
    • JTAG lock
    • Secure keys
    • Secure ROM and boot
    • Customer programmable keys
  • Power, reset, and clock management
  • On-chip debug with CTools technology
  • 28-nm CMOS technology
  • 17 mm × 17 mm, 0.65-mm pitch, 538-pin BGA (CBD)

TI’s new TDA2Ex System-on-Chip (SoC) is a highly optimized and scalable family of devices designed to meet the requirements of leading Advanced Driver Assistance Systems (ADAS). The TDA2Ex family enables broad ADAS applications in today’s automobile by integrating an optimal mix of performance, low power, and ADAS vision analytics processing that aims to facilitate a more autonomous and collision-free driving experience.

The TDA2Ex SoC enables sophisticated embedded vision technology in today’s automobile by enabling a board range of ADAS applications including park assist, surround view and sensor fusion on a single architecture.

The TDA2Ex SoC incorporates a heterogeneous, scalable architecture that includes a mix of TI’s fixed and floating-point TMS320C66x digital signal processor (DSP) generation core, Arm Cortex-A15 MPCore™ and dual-Cortex-M4 processors. The integration of a video accelerator for decoding multiple video streams over an Ethernet AVB network, along with graphics accelerator for rendering virtual views, enable a 3D viewing experience. The TDA2Ex SoC also integrates a host of peripherals including multicamera interfaces (both parallel and serial, including CSI-2) to enable Ethernet or LVDS-based surround view systems, displays and GigB Ethernet AVB.

Additionally, TI provides a complete set of development tools for the Arm and DSP, including C compilers, a DSP assembly optimizer to simplify programming and scheduling, and a debugging interface for visibility into source code execution.

Cryptographic acceleration is available in all devices. All other supported security features, including support for secure boot, debug security and support for trusted execution environment are available on High-Security (HS) devices. For more information about HS devices, contact your TI representative.

The TDA2Ex ADAS processor is qualified according to the AEC-Q100 standard.

TI’s new TDA2Ex System-on-Chip (SoC) is a highly optimized and scalable family of devices designed to meet the requirements of leading Advanced Driver Assistance Systems (ADAS). The TDA2Ex family enables broad ADAS applications in today’s automobile by integrating an optimal mix of performance, low power, and ADAS vision analytics processing that aims to facilitate a more autonomous and collision-free driving experience.

The TDA2Ex SoC enables sophisticated embedded vision technology in today’s automobile by enabling a board range of ADAS applications including park assist, surround view and sensor fusion on a single architecture.

The TDA2Ex SoC incorporates a heterogeneous, scalable architecture that includes a mix of TI’s fixed and floating-point TMS320C66x digital signal processor (DSP) generation core, Arm Cortex-A15 MPCore and dual-Cortex-M4 processors. The integration of a video accelerator for decoding multiple video streams over an Ethernet AVB network, along with graphics accelerator for rendering virtual views, enable a 3D viewing experience. The TDA2Ex SoC also integrates a host of peripherals including multicamera interfaces (both parallel and serial, including CSI-2) to enable Ethernet or LVDS-based surround view systems, displays and GigB Ethernet AVB.

Additionally, TI provides a complete set of development tools for the Arm and DSP, including C compilers, a DSP assembly optimizer to simplify programming and scheduling, and a debugging interface for visibility into source code execution.

Cryptographic acceleration is available in all devices. All other supported security features, including support for secure boot, debug security and support for trusted execution environment are available on High-Security (HS) devices. For more information about HS devices, contact your TI representative.

The TDA2Ex ADAS processor is qualified according to the AEC-Q100 standard.

TI’s new TDA2Ex System-on-Chip (SoC) is a highly optimized and scalable family of devices designed to meet the requirements of leading Advanced Driver Assistance Systems (ADAS). The TDA2Ex family enables broad ADAS applications in today’s automobile by integrating an optimal mix of performance, low power, and ADAS vision analytics processing that aims to facilitate a more autonomous and collision-free driving experience.

The TDA2Ex SoC enables sophisticated embedded vision technology in today’s automobile by enabling a board range of ADAS applications including park assist, surround view and sensor fusion on a single architecture.

The TDA2Ex SoC incorporates a heterogeneous, scalable architecture that includes a mix of TI’s fixed and floating-point TMS320C66x digital signal processor (DSP) generation core, Arm Cortex-A15 MPCore™ and dual-Cortex-M4 processors. The integration of a video accelerator for decoding multiple video streams over an Ethernet AVB network, along with graphics accelerator for rendering virtual views, enable a 3D viewing experience. The TDA2Ex SoC also integrates a host of peripherals including multicamera interfaces (both parallel and serial, including CSI-2) to enable Ethernet or LVDS-based surround view systems, displays and GigB Ethernet AVB.

Additionally, TI provides a complete set of development tools for the Arm and DSP, including C compilers, a DSP assembly optimizer to simplify programming and scheduling, and a debugging interface for visibility into source code execution.

Cryptographic acceleration is available in all devices. All other supported security features, including support for secure boot, debug security and support for trusted execution environment are available on High-Security (HS) devices. For more information about HS devices, contact your TI representative.

The TDA2Ex ADAS processor is qualified according to the AEC-Q100 standard.

TI’s new TDA2Ex System-on-Chip (SoC) is a highly optimized and scalable family of devices designed to meet the requirements of leading Advanced Driver Assistance Systems (ADAS). The TDA2Ex family enables broad ADAS applications in today’s automobile by integrating an optimal mix of performance, low power, and ADAS vision analytics processing that aims to facilitate a more autonomous and collision-free driving experience.

The TDA2Ex SoC enables sophisticated embedded vision technology in today’s automobile by enabling a board range of ADAS applications including park assist, surround view and sensor fusion on a single architecture.

The TDA2Ex SoC incorporates a heterogeneous, scalable architecture that includes a mix of TI’s fixed and floating-point TMS320C66x digital signal processor (DSP) generation core, Arm Cortex-A15 MPCore and dual-Cortex-M4 processors. The integration of a video accelerator for decoding multiple video streams over an Ethernet AVB network, along with graphics accelerator for rendering virtual views, enable a 3D viewing experience. The TDA2Ex SoC also integrates a host of peripherals including multicamera interfaces (both parallel and serial, including CSI-2) to enable Ethernet or LVDS-based surround view systems, displays and GigB Ethernet AVB.

Additionally, TI provides a complete set of development tools for the Arm and DSP, including C compilers, a DSP assembly optimizer to simplify programming and scheduling, and a debugging interface for visibility into source code execution.

Cryptographic acceleration is available in all devices. All other supported security features, including support for secure boot, debug security and support for trusted execution environment are available on High-Security (HS) devices. For more information about HS devices, contact your TI representative.

The TDA2Ex ADAS processor is qualified according to the AEC-Q100 standard.
filter 尋找其它 汽車駕駛輔助 SoC
下載 觀看有字幕稿的影片 影片

技術文件

找不到結果。請清除您的搜尋條件，然後再試一次。
檢視所有 34
重要文件 類型 標題 格式選項 下載最新的英文版本 日期
* 資料表 TDA2Ex SoC for Advanced Driver Assistance Systems (ADAS) 17mm Package (CBD Package) datasheet (Rev. G) PDF | HTML 2019/11/25
* 使用指南 TDA2Ex SoC for Advanced Driver Assistance Systems (ADAS) TRM (Rev. D) 2019/5/21
* 勘誤表 TDA2x ADAS Applications Processor (Rev. K) PDF | HTML 2024/9/8
應用說明 Integrating virtual DRM between VISION SDK and PSDK on Jacinto6 SOC PDF | HTML 2021/5/5
應用說明 IVA-HD Sharing Between VISION-SDK and PSDKLA on Jacinto6 SoC PDF | HTML 2020/8/24
白皮書 Stereo vision- facing the challenges and seeing the opportunities for ADAS (Rev. A) 2020/7/24
白皮書 Paving the way to self-driving cars with ADAS (Rev. A) 2020/7/24
應用說明 AM57x, DRA7x, and TDA2x EMIF Tools (Rev. E) 2020/1/6
應用說明 Integrating New Cameras With Video Input Port on DRA7xx SoCs PDF | HTML 2019/6/11
應用說明 TDA2x/TDA2E Performance (Rev. A) PDF | HTML 2019/6/10
應用說明 The Implementation of YUV422 Output for SRV 2018/8/2
應用說明 MMC DLL Tuning (Rev. B) 2018/7/31
應用說明 Integrating AUTOSAR on TI SoC: Fundamentals 2018/6/18
應用說明 ECC/EDC on TDAxx (Rev. B) 2018/6/13
應用說明 Sharing VPE Between VISIONSDK and PSDKLA 2018/5/4
應用說明 TMS320C66x XMC Memory Protection 2018/1/31
應用說明 DSS Bit Exact Output (Rev. A) 2018/1/12
應用說明 Flashing Utility - mflash 2018/1/9
應用說明 Optimizing DRA7xx and TDA2xx Processors for use with Video Display SERDES (Rev. B) 2017/11/7
應用說明 A Guide to Debugging With CCS on the DRA75x, DRA74x, TDA2x and TDA3x Family of D (Rev. B) 2017/11/3
應用說明 DSS BT656 Workaround for TDA2x (Rev. A) 2017/11/3
功能安全資訊 Safety Features on VisionSDK 2017/10/26
應用說明 Optimization of GPU-Based Surround View on TI’s TDA2x SoC 2017/9/12
白皮書 Step into next-gen architectures for multi-camera operations in automobiles 2017/6/16
白皮書 Making Cars Safer Through Technology Innovation (Rev. A) 2017/6/7
應用說明 Quality of Service (QoS) Knobs for DRA74x, DRA75x & TDA2x Family of Devices (Rev. A) 2016/12/15
應用說明 Quad Channel Camera Application for Surround View and CMS Camera Systems (Rev. A) 2016/8/23
應用說明 ADAS Power Management 2016/3/7
白皮書 Multicore SoCs stay a step ahead of SoC FPGAs 2016/2/23
使用指南 Vision Application Board User's Guide 2016/2/9
白皮書 Surround view camera systems for ADAS (Rev. A) 2015/10/20
應用說明 Guide to fix Perf Issues Using QoS Knobs for DRA74x, DRA75x, TDA2x & TD3x Device 2014/8/13
白皮書 TI Vision SDK, Optimized Vision Libraries for ADAS Systems 2014/4/14
白皮書 TI Gives Sight to Vision-Enabled Automotive Technologies 2013/10/16

設計與開發

如需其他條款或必要資源，請按一下下方的任何標題以檢視詳細頁面 (如有)。

開發套件

D3-3P-DEV — 適用於 AI 相機、硬體、驅動程式與韌體的 D3 Embedded 支援

D3 Embedded 是一家總部位於美國的公司，專注於為高效能應用方式提供整合視覺和毫米波雷達感應、連結、嵌入式處理和人工智慧的端到端解決方案。D3 Embedded 擁有超過 25 年的開發經驗，提供客製化軟體和硬體的開發服務、ISP 架構影像調整、AI 和演算法以及複雜的 DSP 處理鏈開發服務。他們的專業雷達和 DSP 團隊專注於為德州儀器的應用特定處理器提供客製化軟體，其中包括功能強大的全新 C7x DSP。

從：D3 Embedded
支援產品和硬體
開發套件

D3-3P-RVP-TDA2X — 適用於 TDA2 處理器的 D3 Embedded DesignCore® RVP-TDA2x 開發套件

RVP-TDA2x 是用於高階 ADAS 系統的多攝影機平台。它包括兩個 ARM A15 應用處理器、最多四個視覺加速 Pac (EVE) 協同處理器和一個硬體加速的 H.264 編碼器。開發套件支援八個攝影機輸入，但可以視需求自訂。套件購買包括軟體分發和一次性授權。

從：D3 Embedded
支援產品和硬體
軟體開發套件 (SDK)

PROCESSOR-SDK-RADAR — RTOS Processor SDK for Radar

處理器 SDK-Vision (Vision SDK) 和處理器 SDK-Radar (Radar SDK) 是適用於 TDAx 處理器的多處理器軟體開發套件。軟體架構可讓使用者建立不同的 ADAS 應用資料流程，其中包含雷達擷取、雷達處理、視訊擷取、視訊預處理、視訊分析演算法和視訊顯示。.此版本還整合了處理器 SDK Linux，以啟用需要 Linux 和 GPU 的汽車 ADAS 功能和示範。SDK 具備適用 EVE 和 DSP 的基礎驅動器、運算與視覺核心。此外還具有使用 TI 範例演算法的示範使用案例，演練 ADAS SoC 中的不同 CPU (...)

支援產品和硬體
軟體開發套件 (SDK)

PROCESSOR-SDK-VISION — Linux and RTOS Processor SDK for Vision

處理器 SDK-Vision (Vision SDK) 和處理器 SDK-Radar (Radar SDK) 是適用於 TDAx 處理器的多處理器軟體開發套件。軟體架構可讓使用者建立不同的 ADAS 應用資料流程，其中包含雷達擷取、雷達處理、視訊擷取、視訊預處理、視訊分析演算法和視訊顯示。.此版本還整合了處理器 SDK Linux，以啟用需要 Linux 和 GPU 的汽車 ADAS 功能和示範。SDK 具備適用 EVE 和 DSP 的基礎驅動器、運算與視覺核心。此外還具有使用 TI 範例演算法的示範使用案例，演練 ADAS SoC 中的不同 CPU (...)

支援產品和硬體
IDE、配置、編譯器或偵錯程式

CCSTUDIO — Code Composer Studio™ integrated development environment (IDE)

CCStudio™ IDE is part of TI's extensive CCStudio™ development ecosystem and is an integrated development environment for TI's microcontrollers, processors, wireless connectivity devices, and radar sensors. CCStudio IDE is available as desktop or cloud-based applications. The cloud version (...)

支援產品和硬體
IDE、配置、編譯器或偵錯程式

SYSCONFIG — Standalone desktop version of SysConfig

CCStudio™ SysConfig is part of TI's extensive CCStudio™ development ecosystem and is a configuration tool that simplifies hardware and software configuration challenges to accelerate software development.

SysConfig provides an intuitive graphical user interface for configuring pins, peripherals, (...)

支援產品和硬體
作業系統 (OS)

GHS-INTEGRITY-RTOS — Green Hills INTEGRITY RTOS

The flagship of Green Hills Software operating systems—the INTEGRITY RTOS—is built around a partitioning architecture to provide embedded systems with total reliability, absolute security, and maximum real-time performance. With its leadership pedigree underscored by certifications in a (...)
支援產品和硬體
模擬型號

TDA2Ex-17 BSDL Model (Rev. A)

SPRM698A.ZIP (15 KB) - BSDL 模型
支援產品和硬體
模擬型號

TDA2Ex-17 IBIS Model

SPRM700.ZIP (9618 KB) - IBIS 模型
支援產品和硬體
模擬型號

TDA2Ex-17 Thermal Model

SPRM699.ZIP (2 KB) - 熱模型
支援產品和硬體
計算工具

CLOCKTREETOOL — 適用於 Sitara、車用、視覺分析和數位訊號處理器的時脈樹工具

The Clock Tree Tool (CTT) for Sitara™ ARM®, Automotive, and Digital Signal Processors is an interactive clock tree configuration software that provides information about the clocks and modules in these TI devices. It allows the user to:

  • Visualize the device clock tree
  • Interact with clock tree (...)
支援產品和硬體
封裝 針腳 CAD 符號、佔位空間與 3D 模型
FCCSP (CBD) 538 Ultra Librarian
適用 TI 的評估品項標準條款與條件。

訂購與品質

建議產品可能具有與此 TI 產品相關的參數、評估模組或參考設計。

支援與培訓

內含 TI 工程師技術支援的 TI E2E™ 論壇

以英文檢視所有論壇主題

內容係由 TI 和社群貢獻者依「現狀」提供，且不構成 TI 規範。檢視使用條款。

若有關於品質、封裝或訂購 TI 產品的問題，請參閱 TI 支援。​​​​​​​​​​​​​​

影片