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TLV6722

現行

八路小型可插拔雙通道比較器

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產品規格表

TLV6722

現行
產品規格表 立即訂購

產品詳細資料

Number of channels 2 Output type Open-drain, Push-Pull Propagation delay time (µs) 0.6 Vs (max) (V) 3.465 Vs (min) (V) 3.135 Rating Catalog Features Hysteresis, Internal Reference Iq per channel (typ) (mA) 0.00195 Rail-to-rail In Operating temperature range (°C) -25 to 105 VICR (max) (V) 3.465 VICR (min) (V) 0
Number of channels 2 Output type Open-drain, Push-Pull Propagation delay time (µs) 0.6 Vs (max) (V) 3.465 Vs (min) (V) 3.135 Rating Catalog Features Hysteresis, Internal Reference Iq per channel (typ) (mA) 0.00195 Rail-to-rail In Operating temperature range (°C) -25 to 105 VICR (max) (V) 3.465 VICR (min) (V) 0
DSBGA (YBJ) 9 1.44 mm² (1.2 mm × 1.2 mm)
  • Compliant with OSFP and OSFP-XD MSAs
  • Precision integrated resistors
  • Integrated reference
  • Dual comparators
    • M_RSTn: Open-drain output
    • M_LPWn: Push-pull output
    • Internal hysteresis
  • Integrated clock buffer (TLV6723 and TLV6724)
  • Known start-up conditions
  • Separate host and module supplies:
    • H_VCC: 3.135V to 3.465V
    • M_VCC: 1.1V to H_VCC
  • -25°C to 105°C operating temperature range
  • Small size package:
    • 1.2mm x 1.2mm DSBGA-9 (YBJ)
  • Compliant with OSFP and OSFP-XD MSAs
  • Precision integrated resistors
  • Integrated reference
  • Dual comparators
    • M_RSTn: Open-drain output
    • M_LPWn: Push-pull output
    • Internal hysteresis
  • Integrated clock buffer (TLV6723 and TLV6724)
  • Known start-up conditions
  • Separate host and module supplies:
    • H_VCC: 3.135V to 3.465V
    • M_VCC: 1.1V to H_VCC
  • -25°C to 105°C operating temperature range
  • Small size package:
    • 1.2mm x 1.2mm DSBGA-9 (YBJ)

The TLV672x are a family of devices that fully integrates the module-side INT/RSTn and LPWn/PRSn(/ePPS) circuits as defined by the OSFP and OSFP-XD MSAs. The TLV672x integrates all devices and passives for the INT/RSTn and LPWn/PRsn(/ePPS) circuits into a small-size 1.2mm x 1.2mm DSBGA-9 package. This makes the TLV672x well-suited for space-critical OSFP and OSFP-XD module designs.

The TLV672x contains integrated resistors and voltage reference that are factory-trimmed per the specifications of the OSFP and OSFP-XD MSAs, making sure that the host-to-module interface voltages and comparator switching thresholds are within the proper voltage zones.

The M_LPWn comparator within the TLV672x has a push-pull output that is capable of being powered by a separate voltage supply (M_VCC). This allows for level-shifting of host-to-module logic levels without the need of a discrete pull-up resistor. The M_RSTn comparator within the TLV672x has an open-drain output allowing for easy OR-ing of multiple reset signal drivers.

The TLV6723 and TLV6724 have an integrated clock buffer that can support an embedded pulse-per-second or reference clock signal up to 156.25MHz as defined on the OSFP-XD MSA. Whenever the M_LPWn signal is low (asserted true), the integrated clock buffer on the TLV6723 enters a self-shutdown mode, lowering the quiescent current and saving power.

The TLV672x are a family of devices that fully integrates the module-side INT/RSTn and LPWn/PRSn(/ePPS) circuits as defined by the OSFP and OSFP-XD MSAs. The TLV672x integrates all devices and passives for the INT/RSTn and LPWn/PRsn(/ePPS) circuits into a small-size 1.2mm x 1.2mm DSBGA-9 package. This makes the TLV672x well-suited for space-critical OSFP and OSFP-XD module designs.

The TLV672x contains integrated resistors and voltage reference that are factory-trimmed per the specifications of the OSFP and OSFP-XD MSAs, making sure that the host-to-module interface voltages and comparator switching thresholds are within the proper voltage zones.

The M_LPWn comparator within the TLV672x has a push-pull output that is capable of being powered by a separate voltage supply (M_VCC). This allows for level-shifting of host-to-module logic levels without the need of a discrete pull-up resistor. The M_RSTn comparator within the TLV672x has an open-drain output allowing for easy OR-ing of multiple reset signal drivers.

The TLV6723 and TLV6724 have an integrated clock buffer that can support an embedded pulse-per-second or reference clock signal up to 156.25MHz as defined on the OSFP-XD MSA. Whenever the M_LPWn signal is low (asserted true), the integrated clock buffer on the TLV6723 enters a self-shutdown mode, lowering the quiescent current and saving power.
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重要文件 類型 標題 格式選項 下載最新的英文版本 日期
* 資料表 TLV672x OSFP/OSFP-XD Module Low-Speed Signals Controller with ePPS Support datasheet PDF | HTML 2025/12/22

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開發板

TLV672XEVM — TLV672x 評估模組

TLV672X 評估模組 (EVM) 是可評估 TLV6722 主要功能與性能的平台。TLV6722 裝置將 OSFP 模組側 INT/RSTn 和 LPWn/PRSn 電路整合至小型 DSBGA-9 (YBJ) 封裝中。TLV672XEVM 支援 OSFP 主機端組件以示範 TLV6722 的應用程式內功能。

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模擬型號

TLV6722 PSpice Model

SNOM824.ZIP (111 KB) - PSpice 模型
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模擬型號

TLV6722 TINA-TI Model

SNOM823.ZIP (6 KB) - TINA-TI Spice 模型
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DSBGA (YBJ) 9 Ultra Librarian
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