產品詳細資料

Number of channels 2 Total supply voltage (+5 V = 5, ±5 V = 10) (max) (V) 5.5 Total supply voltage (+5 V = 5, ±5 V = 10) (min) (V) 2.5 Rail-to-rail In, Out GBW (typ) (MHz) 8 Slew rate (typ) (V/µs) 6.5 Vos (offset voltage at 25°C) (max) (mV) 1.5 Iq per channel (typ) (mA) 0.6 Vn at 1 kHz (typ) (nV√Hz) 18 Rating Catalog Operating temperature range (°C) -40 to 125 Offset drift (typ) (µV/°C) 0.53 Features EMI Hardened CMRR (typ) (dB) 103 Iout (typ) (A) 0.05 Architecture CMOS Input common mode headroom (to negative supply) (typ) (V) -0.1 Input common mode headroom (to positive supply) (typ) (V) 0.1 Output swing headroom (to negative supply) (typ) (V) 0.015 Output swing headroom (to positive supply) (typ) (V) -0.015
Number of channels 2 Total supply voltage (+5 V = 5, ±5 V = 10) (max) (V) 5.5 Total supply voltage (+5 V = 5, ±5 V = 10) (min) (V) 2.5 Rail-to-rail In, Out GBW (typ) (MHz) 8 Slew rate (typ) (V/µs) 6.5 Vos (offset voltage at 25°C) (max) (mV) 1.5 Iq per channel (typ) (mA) 0.6 Vn at 1 kHz (typ) (nV√Hz) 18 Rating Catalog Operating temperature range (°C) -40 to 125 Offset drift (typ) (µV/°C) 0.53 Features EMI Hardened CMRR (typ) (dB) 103 Iout (typ) (A) 0.05 Architecture CMOS Input common mode headroom (to negative supply) (typ) (V) -0.1 Input common mode headroom (to positive supply) (typ) (V) 0.1 Output swing headroom (to negative supply) (typ) (V) 0.015 Output swing headroom (to positive supply) (typ) (V) -0.015
SOIC (D) 8 29.4 mm² 4.9 x 6 SOT-23-THN (DDF) 8 8.12 mm² 2.9 x 2.8 TSSOP (PW) 8 19.2 mm² 3 x 6.4 VSSOP (DGK) 8 14.7 mm² 3 x 4.9 WSON (DSG) 8 4 mm² 2 x 2
  • Rail-to-rail input and output
  • Low noise: 18 nV/√Hz at 1 kHz
  • Low power consumption: 550 µA (typical)
  • High-gain bandwidth: 8 MHz
  • Operating supply voltage from 2.5 V to 5.5 V
  • Low input bias current: 1 pA (typical)
  • Low input offset voltage: 1.5 mV (maximum)
  • Low offset voltage drift: ±0.5 µV/°C (typical)
  • ESD internal protection: ±4-kV human-body model (HBM)
  • Extended temperature range: –40°C to 125°C
  • Rail-to-rail input and output
  • Low noise: 18 nV/√Hz at 1 kHz
  • Low power consumption: 550 µA (typical)
  • High-gain bandwidth: 8 MHz
  • Operating supply voltage from 2.5 V to 5.5 V
  • Low input bias current: 1 pA (typical)
  • Low input offset voltage: 1.5 mV (maximum)
  • Low offset voltage drift: ±0.5 µV/°C (typical)
  • ESD internal protection: ±4-kV human-body model (HBM)
  • Extended temperature range: –40°C to 125°C

The TSV91x family, which includes single-, dual-, and quad-channel operational amplifiers (op amps), is specifically designed for general-purpose applications. Featuring rail-to-rail input and output (RRIO) swings, wide bandwidth (8 MHz), and low offset voltage (0.3 mV, typical), this family is designed for a variety of applications that require a good balance between speed and power consumption. The op amps are unity-gain stable and feature an ultra-low input bias current, which enables the family to be used in applications with high-source impedances. The low input bias current allows the devices to be used for sensor interfaces, battery-supplied and portable applications, and active filtering.

The robust design of the TSV91x provides ease-of-use to the circuit designer. Features include a unity-gain stable, integrated RFI-EMI rejection filter, no phase reversal in overdrive condition, and high electrostatic discharge (ESD) protection (4-kV HBV).

The TSV91x family, which includes single-, dual-, and quad-channel operational amplifiers (op amps), is specifically designed for general-purpose applications. Featuring rail-to-rail input and output (RRIO) swings, wide bandwidth (8 MHz), and low offset voltage (0.3 mV, typical), this family is designed for a variety of applications that require a good balance between speed and power consumption. The op amps are unity-gain stable and feature an ultra-low input bias current, which enables the family to be used in applications with high-source impedances. The low input bias current allows the devices to be used for sensor interfaces, battery-supplied and portable applications, and active filtering.

The robust design of the TSV91x provides ease-of-use to the circuit designer. Features include a unity-gain stable, integrated RFI-EMI rejection filter, no phase reversal in overdrive condition, and high electrostatic discharge (ESD) protection (4-kV HBV).

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類型 標題 日期
* Data sheet TSV91x Rail-to-Rail Input/Output, 8-MHz Operational Amplifiers datasheet (Rev. D) PDF | HTML 2019年 10月 1日
User guide SMALL-AMP-DIP Evaluation Module (EVM) (Rev. A) 2021年 7月 30日
Circuit design Non-inverting op amp with inverting positive reference voltage circuit (Rev. A) 2019年 2月 4日
Analog Design Journal Second-sourcing options for small-package amplifiers 2018年 3月 26日

設計與開發

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開發板

DIP-ADAPTER-EVM — DIP 轉接器評估模組

Speed up your op amp prototyping and testing with the DIP-Adapter-EVM, which provides a fast, easy and inexpensive way to interface with small, surface-mount ICs. You can connect any supported op amp using the included Samtec terminal strips or wire them directly to existing circuits.

The (...)

使用指南: PDF
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開發板

DUAL-DIYAMP-EVM — 雙通道通用自製 (DIY) 放大器電路評估模組

The DUAL-DIYAMP-EVM is a unique evaluation module (EVM) family that provides engineers and do it yourselfers (DIYers) with real-world amplifier circuits, enabling you to quickly evaluate design concepts and verify simulations. It is designed specifically for dual package op amps in the (...)
使用指南: PDF
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開發板

SMALL-AMP-DIP-EVM — 適用於採用小尺寸封裝之運算放大器的評估模組

SMALL-AMP-DIP-EVM 提供快速簡易方式,與許多業界標準小型封裝進行介接,因而加速小型封裝運算放大器原型設計。SMALL-AMP-DIP-EVM 支援八個小型封裝選項,包括 DPW-5 (X2SON)、DSG-8 (WSON)、DCN-8 (SOT)、DDF-8 (SOT)、RUG-10 (X2QFN)、RUC-14 (X2QFN)、RGY-14 (VQFN) 和 RTE-16 (WQFN)。

使用指南: PDF
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模擬型號

TSV912 PSpice Model (Rev. D)

SBOMAG6D.ZIP (22 KB) - PSpice Model
模擬型號

TSV912 TINA-TI Reference Design (Rev. C)

SBOMAG7C.ZIP (38 KB) - TINA-TI Reference Design
模擬型號

TSV912 TINA-TI Spice Model (Rev. C)

SBOMAG8C.ZIP (4 KB) - TINA-TI Spice Model
計算工具

ANALOG-ENGINEER-CALC — 類比工程師計算機

The Analog Engineer’s Calculator is designed to speed up many of the repetitive calculations that analog circuit design engineers use on a regular basis. This PC-based tool provides a graphical interface with a list of various common calculations ranging from setting op-amp gain with feedback (...)
設計工具

CIRCUIT060013 — 具有 T 網路回饋電路的反相放大器

此設計可反轉輸入訊號 VIN,並使用 1000 V/V 或 60 dB 訊號增益。具有 T 回饋網路的反相放大器可在沒有較小 R4 值或超大回饋電阻器值的情況下獲得高增益。
設計工具

CIRCUIT060015 — 可調式參考電壓電路

此電路結合反相及非反相放大器,讓參考電壓可從負輸入電壓向上調整至輸入電壓。可加入增益以提高最大負參考位準。
設計工具

CIRCUIT060063 — 具有反相正參考電壓電路的非反相運算放大器

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設計工具

CIRCUIT060074 — 具有比較器電路的高壓側電流感測

此高壓側電流感測解決方案使用一個具有軌對軌輸入共模範圍的比較器,若負載電流上升到 1 A 以上,便在比較器輸出 (COMP OUT) 建立過電流警示 (OC 警示) 訊號。此實作中的 OC 訊號為低電位作動。因此當超過 1-A 閾值時,比較器輸出會變低。實作磁滯後會在負載電流降低至 0.5 A (減少 50%) 時,讓 OC-Alert 返回邏輯高狀態。此電路利用開漏輸出比較器,為控制數位邏輯輸入針腳而進行電平轉換輸出高邏輯電平。對於需要驅動 MOSFET 開關閘極的應用,建議使用具推挽輸出的比較器。
設計工具

SBOC512 Simulation for Non-Inverting Op Amp With Inverting Positive Reference

支援產品和硬體

支援產品和硬體

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精密度運算放大器 (Vos<1mV)
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硬體開發
設計工具
CIRCUIT060063 具有反相正參考電壓電路的非反相運算放大器
模擬工具

PSPICE-FOR-TI — PSpice® for TI 設計與模擬工具

PSpice® for TI is a design and simulation environment that helps evaluate functionality of analog circuits. This full-featured, design and simulation suite uses an analog analysis engine from Cadence®. Available at no cost, PSpice for TI includes one of the largest model libraries in the (...)
模擬工具

TINA-TI — 基於 SPICE 的類比模擬程式

TINA-TI provides all the conventional DC, transient and frequency domain analysis of SPICE and much more. TINA has extensive post-processing capability that allows you to format results the way you want them. Virtual instruments allow you to select input waveforms and probe circuit nodes voltages (...)
使用指南: PDF
封裝 引腳 下載
SOIC (D) 8 檢視選項
SOT-23-THN (DDF) 8 檢視選項
TSSOP (PW) 8 檢視選項
VSSOP (DGK) 8 檢視選項
WSON (DSG) 8 檢視選項

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