DP83826EVM

DP83826 Low-latency 10/100 ethernet PHY evaluation module

DP83826EVM

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Overview

The DP83826EVM is aimed at highlighting the low latency, deterministic, and low power DP83826 Ethernet PHY. It supports 100BASE-TX and 10BASE-Te Ethernet protocols. The evaluation board (EVM) provides a quick and easy platform to evaluate various features supported by DP83826. The EVM will have connections to exercise the MII and RMII functions of DP83826.
  • 150m Cat5 cable reach
  • 100Base-TX, 10Base-Te
  • On-Board MSP430F5529 with USB-2-MDIO for register access
  • Supports interoperability testing, compliance testing and BER testing
Ethernet PHYs
DP83826E Low latency 10/100-Mbps PHY with MII interface and enhanced mode DP83826I Low latency 10/100-Mbps PHY, MII interface and enhanced mode with an industrial temperature range
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Evaluation board

DP83826EVM – Low-Latency 10/100 ethernet PHY evaluation module

TI's Standard Terms and Conditions for Evaluation Items apply.

Design files

DP83826EVM Schematic and Assembly Files SNLR047.ZIP (5999 KB)

Technical documentation

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Type Title Date
* User guide DP83826EVM User's Guide Aug. 02, 2019
More literature DP83826EVM EU Declaration of Conformity (DoC) Jun. 04, 2020
Application note KSZ8081 to DP83826E System Rollover Jan. 10, 2020

Related design resources

Software development

APPLICATION SOFTWARE & FRAMEWORK
USB-2-MDIOUSB to MDIO serial management tool

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