This register indicates the detection of SPI fault conditions.
|LEGEND: R = Read only; -n = value after reset|
Always read 00h.
|2||F_STARTUP||R||0h||ADC startup fault.
This bit indicates if an error is detected during power-up. This bit clears only when power is recycled.
0 : No fault has occurred
1 : A fault has occurred
This bit is set if CS transitions when the SCLK pin is high. This bit auto-clears on a STAT_S transfer, unless the condition remains.
0 : CS is asserted or deasserted when SCLK is low
1 : CS is asserted or deasserted when SCLK is high
This bit is set if the device detects that not enough SCLK cycles are sent in a data frame for the existing mode of operation. This bit auto-clears on a STAT_S transfer, unless the condition remains.
0 : Enough SCLKs are sent per frame
1 : Not enough SCLKs are sent per frame