SLUSE99C Data sheet

SLUSE99C September 2021 – January 2023 BQ25180

PRODUCTION DATA

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)

YBG|8

Thermal pad, mechanical data (Package|Pins)

Orderable Information

8.5.1 I2C Registers

Table 8-7 lists the memory-mapped registers for the I2C registers. All register offset addresses not listed in Table 8-7 should be considered as reserved locations and the register contents should not be modified.

Table 8-7 I2C Registers

Offset	Acronym	Register Name	Section
0x0	STAT0	Charger Status	Go
0x1	STAT1	Charger Status and Faults	Go
0x2	FLAG0	Charger Flag Registers	Go
0x3	VBAT_CTRL	Battery Voltage Control	Go
0x4	ICHG_CTRL	Fast Charge Current Control	Go
0x5	CHARGECTRL0	Charger Control 0	Go
0x6	CHARGECTRL1	Charger Control 1	Go
0x7	IC_CTRL	IC Control	Go
0x8	TMR_ILIM	Timer and Input Current Limit Control	Go
0x9	SHIP_RST	Shipmode, Reset and Pushbutton Control	Go
0xA	SYS_REG	SYS Regulation Voltage Control	Go
0xB	TS_CONTROL	TS Control	Go
0xC	MASK_ID	MASK and Device ID	Go

Complex bit access types are encoded to fit into small table cells. Table 8-8 shows the codes that are used for access types in this section.

Table 8-8 I2C Access Type Codes

Access Type	Code	Description
Read Type
R	R	Read
RC	R C	Read to Clear
Write Type
W	W	Write
Reset or Default Value
-n		Value after reset or the default value

8.5.1.1 STAT0 Register (Offset = 0x0) [Reset = X]

STAT0 is shown in Figure 8-10 and described in Table 8-9.

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Figure 8-10 STAT0 Register

7	6	5	4	3	2	1	0
TS_OPEN_STAT	CHG_STAT_1:0		ILIM_ACTIVE_STAT	VDPPM_ACTIVE_STAT	VINDPM_ACTIVE_STAT	THERMREG_ACTIVE_STAT	VIN_PGOOD_STAT
R-X	R-X		R-X	R-X	R-X	R-X	R-X

Table 8-9 STAT0 Register Field Descriptions

Bit	Field	Type	Reset	Description
7	TS_OPEN_STAT	R	X	TS Open Status 1b0 = TSMR pin is not Open 1b1 = TSMR pin is Open
6-5	CHG_STAT_1:0	R	X	Charging Status Indicator 2b00 = Not Charging while charging is enabled. 2b01 = Constant Current Charging (Trickle Charge/ Pre Charge or in Fast Charge Mode) 2b10 = Constant Voltage Charging 2b11 = Charge Done or charging is disabled by the host.
4	ILIM_ACTIVE_STAT	R	X	Input Curent Limit Active 1b0 = Not Active 1b1 = Active
3	VDPPM_ACTIVE_STAT	R	X	VDPPM Mode Active 1b0 = Not Active 1b1 = Active
2	VINDPM_ACTIVE_STAT	R	X	VINDPM Mode Active 1b0 = Not Active 1b1 = Active
1	THERMREG_ACTIVE_STAT	R	X	Thermal Regulation Active 1b0 = Not Active 1b1 = Active
0	VIN_PGOOD_STAT	R	X	VIN Power Good 1b0 = VIN Power Not Good 1b1 = VIN Power Good

8.5.1.2 STAT1 Register (Offset = 0x1) [Reset = X]

STAT1 is shown in Figure 8-11 and described in Table 8-10.

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Figure 8-11 STAT1 Register

7	6	5	4	3	2	1	0
VIN_OVP_STAT	BUVLO_STAT	RESERVED	TS_STAT_1:0		SAFETY_TMR_FAULT_FLAG	WAKE1_FLAG	WAKE2_FLAG
R-1b0	R-X	R-X	R-2b00		RC-1b0	RC-1b0	RC-1b0

Table 8-10 STAT1 Register Field Descriptions

Bit	Field	Type	Reset	Description
7	VIN_OVP_STAT	R	1b0	VIN_OVP Fault 1b0 = Not Active 1b1 = Active
6	BUVLO_STAT	R	X	Battery UVLO Status 1b0 = Not Active 1b1 = Active
5	RESERVED	R	X	Reserved
4-3	TS_STAT_1:0	R	2b00	TS Status 2b00 = Normal 2b01 = VTS < VHOT or VTS > VCOLD(charging suspended) 2b10 = VCOOL < VTS < VCOLD (Charging current reduced by value set by TS_Registers) 2b11 = VWARM > VTS > VHOT (Charging voltage reduced by value set by TS_Registers)
2	SAFETY_TMR_FAULT_FLAG	RC	1b0	Safety Timer Expired Fault Cleared only after CE is toggled. 1b0 = Not Active 1b1 = Active
1	WAKE1_FLAG	RC	1b0	Wake 1 Timer Flag 1b0 = Does not meet Wake 1 Condition 1b1 = Met Wake 1 Condition
0	WAKE2_FLAG	RC	1b0	Wake 2 Timer Flag 1b0 = Does not meet Wake 2 Condition 1b1 = Met Wake2 Condition

8.5.1.3 FLAG0 Register (Offset = 0x2) [Reset = X]

FLAG0 is shown in Figure 8-12 and described in Table 8-11.

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Figure 8-12 FLAG0 Register

7	6	5	4	3	2	1	0
TS_FAULT	ILIM_ACTIVE_FLAG	VDPPM_ACTIVE_FLAG	VINDPM_ACTIVE_FLAG	THERMREG_ACTIVE_FLAG	VIN_OVP_FAULT_FLAG	BUVLO_FAULT_FLAG	BAT_OCP_FAULT
RC-X	RC-X	RC-X	RC-X	RC-X	RC-X	RC-X	RC-X

Table 8-11 FLAG0 Register Field Descriptions

Bit	Field	Type	Reset	Description
7	TS_FAULT	RC	X	TS_Fault 1b0 = No TS Fault detected 1b1 = TS Fault detected
6	ILIM_ACTIVE_FLAG	RC	X	ILIM Active 1b0 = NO ILIM Fault detected 1b1 = ILIM Fault detected
5	VDPPM_ACTIVE_FLAG	RC	X	VDPPM FLAG 1b0 = VDPPM fault not detected 1b1 = VDPPM fault detected
4	VINDPM_ACTIVE_FLAG	RC	X	VINDPM FLAG 1b0 = VINDPM fault not detected 1b1 = VINDPM fault detected
3	THERMREG_ACTIVE_FLAG	RC	X	Thermal Regulation FLAG 1b0 = No thermal regulation detected 1b1 = Thermal regulation has occured
2	VIN_OVP_FAULT_FLAG	RC	X	VIN_OVP FLAG 1b0 = VIN_OVP fault not detected 1b1 = VIN_OVP fault detected
1	BUVLO_FAULT_FLAG	RC	X	Battery undervoltage FLAG 1b0 = Battery undervoltage fault not detected 1b1 = Battery undervoltage fault detected
0	BAT_OCP_FAULT	RC	X	Battery overcurrent protection 1b0 = Battery overcurrent condition not detected 1b1 = Battery overcurrent condition detected

8.5.1.4 VBAT_CTRL Register (Offset = 0x3) [Reset = 0x46]

VBAT_CTRL is shown in Figure 8-13 and described in Table 8-12.

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Figure 8-13 VBAT_CTRL Register

7	6	5	4	3	2	1	0
RESERVED	VBATREG_6:0
R/W-1b0	R/W-7b1000110

Table 8-12 VBAT_CTRL Register Field Descriptions

Bit	Field	Type	Reset	Description
7	RESERVED	R/W	1b0	Reserved
6-0	VBATREG_6:0	R/W	7b1000110	Battery Regulation Voltage VBATREG= 3.5V + VBATREG_CODE * 10mV. Maximum programmable voltage = 4.65V

8.5.1.5 ICHG_CTRL Register (Offset = 0x4) [Reset = 0x05]

ICHG_CTRL is shown in Figure 8-14 and described in Table 8-13.

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Figure 8-14 ICHG_CTRL Register

7	6	5	4	3	2	1	0
CHG_DIS	ICHG_6:0
R/W-1b0	R/W-7b0000101

Table 8-13 ICHG_CTRL Register Field Descriptions

Bit	Field	Type	Reset	Description
7	CHG_DIS	R/W	1b0	Charge Disable 1b0 = Battery Charging Enabled 1b1 = Battery Charging Disabled
6-0	ICHG_6:0	R/W	7b0000101	For ICHG <= 35mA = ICHGCODE +5mA For ICHG > 35mA = 40+((ICHGCODE-31)*10)mA. Maximum programmable current = 1000mA

8.5.1.6 CHARGECTRL0 Register (Offset = 0x5) [Reset = 0x2C]

CHARGECTRL0 is shown in Figure 8-15 and described in Table 8-14.

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Figure 8-15 CHARGECTRL0 Register

7	6	5	4	3	2	1	0
RESERVED	IPRECHG	ITERM_1:0		VINDPM_1:0		THERM_REG_1:0
R/W-1b0	R/W-1b0	R/W-2b10		R/W-2b11		R/W-2b00

Table 8-14 CHARGECTRL0 Register Field Descriptions

Bit	Field	Type	Reset	Description
7	RESERVED	R/W	1b0	Reserved
6	IPRECHG	R/W	1b0	Precharge current = x times of term 1b0 = Precharge is 2x Term 1b1 = Precharge is Term
5-4	ITERM_1:0	R/W	2b10	Termination current = % of Icharge 2b00 = Disable 2b01 = 5% of ICHG 2b10 = 10% of ICHG 2b11 = 20% of ICHG
3-2	VINDPM_1:0	R/W	2b11	VINDPM Level Selection 2b00 = 4.2 V 2b01 = 4.5 V 2b10 = 4.7 V 2b11 = Disabled
1-0	THERM_REG_1:0	R/W	2b00	Thermal Regulation Threshold 2b00 = 100C 2b11 = Disabled

8.5.1.7 CHARGECTRL1 Register (Offset = 0x6) [Reset = 0x56]

CHARGECTRL1 is shown in Figure 8-16 and described in Table 8-15.

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Figure 8-16 CHARGECTRL1 Register

7	6	5	4	3	2	1	0
IBAT_OCP_1:0		BUVLO_2:0			CHG_STATUS_INT_MASK	ILIM_INT_MASK	VDPM_INT_MASK
R/W-2b01		R/W-3b010			R/W-1b1	R/W-1b1	R/W-1b0

Table 8-15 CHARGECTRL1 Register Field Descriptions

Bit	Field	Type	Reset	Description
7-6	IBAT_OCP_1:0	R/W	2b01	Battery Discharge Current Limit 2b00 = 500mA 2b01 = 1000mA 2b10 = 1500mA 2b11 = Disabled
5-3	BUVLO_2:0	R/W	3b010	Battery Undervoltage LockOut Falling Threshold. 3b000 = 3.0V 3b001 = 3.0V 3b010 = 3.0V 3b011 = 2.8V 3b100 = 2.6V 3b101 = 2.4V 3b110 = 2.2V 3b111 = 2.0V
2	CHG_STATUS_INT_MASK	R/W	1b1	Mask Charging Status Interrupt 1b0 = Enable Charging Status Interrupt anytime there is a charging status change. 1b1 = Mask Charging Status Interrupt
1	ILIM_INT_MASK	R/W	1b1	Mask ILIM Fault Interrupt 1b0 = Enable ILIM Interrupt 1b1 = Mask ILIM Interrupt
0	VDPM_INT_MASK	R/W	1b0	Mask VINDPM and VDPPM Interrupt 1b0 = Enable VINDPM and VDPPM Interrupt 1b1 = Mask VINDPM and VDPPM Interrupt

8.5.1.8 IC_CTRL Register (Offset = 0x7) [Reset = 0x84]

IC_CTRL is shown in Figure 8-17 and described in Table 8-16.

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Figure 8-17 IC_CTRL Register

7	6	5	4	3	2	1	0
TS_EN	VLOWV_SEL	VRCH_0	2XTMR_EN	SAFETY_TIMER_1:0		WATCHDOG_SEL_1:0
R/W-1b1	R/W-1b0	R/W-1b0	R/W-1b0	R/W-2b01		R/W-2b00

Table 8-16 IC_CTRL Register Field Descriptions

Bit	Field	Type	Reset	Description
7	TS_EN	R/W	1b1	TS Auto Function 1b0 = TS auto function disabled (Only charge control is disabled. TS monitoring is enabled) 1b1 = TS auto function enabled
6	VLOWV_SEL	R/W	1b0	Precharge Voltage Threshold (VLOWV) 1b0 = 3V 1b1 = 2.8V
5	VRCH_0	R/W	1b0	Recharge Voltage Threshold 1b0 = 100mV 1b1 = 200 mV
4	2XTMR_EN	R/W	1b0	Timer Slow 1b0 = The timer is not slowed at any time 1b1 = The timer is slowed by 2x when in any control other than CC or CV
3-2	SAFETY_TIMER_1:0	R/W	2b01	Fast Charge Timer 2b00 = 3 hour fast charge 2b01 = 6 hour fast charge 2b10 = 12 hour fast charge 2b11 = Disable safety timer
1-0	WATCHDOG_SEL_1:0	R/W	2b00	Watchdog Selection 2b00 = 160s default register values 2b01 = 160s HW_RESET 2b10 = 40s HW_RESET 2b11 = Disable watchdog function

8.5.1.9 TMR_ILIM Register (Offset = 0x8) [Reset = 0x4D]

TMR_ILIM is shown in Figure 8-18 and described in Table 8-17.

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Figure 8-18 TMR_ILIM Register

7	6	5	4	3	2	1	0
MR_LPRESS_1:0		MR_RESET_VIN	AUTOWAKE_1:0		ILIM_2:0
R/W-2b01		R/W-1b0	R/W-2b01		R/W-3b101

Table 8-17 TMR_ILIM Register Field Descriptions

Bit	Field	Type	Reset	Description
7-6	MR_LPRESS_1:0	R/W	2b01	Push button Long Press duration timer 2b00 = 5s 2b01 = 10s 2b10 = 15s 2b11 = 20s
5	MR_RESET_VIN	R/W	1b0	Hardware reset condition 1b0 = Reset sent when long press duration is met 1b1 = Reset sent when long press duration is met and VIN_Powergood
4-3	AUTOWAKE_1:0	R/W	2b01	Auto Wake Up Timer Restart 2b00 = 0.5s 2b01 = 1s 2b10 = 2s 2b11 = 4s
2-0	ILIM_2:0	R/W	3b101	Input Current Limit Setting 3b000 = 50mA 3b001 = 100mA(max.) 3b010 = 200mA 3b011 = 300mA 3b100 = 400mA 3b101 = 500mA(max.) 3b110 = 700mA 3b111 = 1100mA

8.5.1.10 SHIP_RST Register (Offset = 0x9) [Reset = 0x11]

SHIP_RST is shown in Figure 8-19 and described in Table 8-18.

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Figure 8-19 SHIP_RST Register

7	6	5	4	3	2	1	0
REG_RST	EN_RST_SHIP_1:0		PB_LPRESS_ACTION_1:0		WAKE1_TMR	WAKE2_TMR	EN_PUSH
R/W-1b0	R/W-2b00		R/W-2b10		R/W-1b0	R/W-1b0	R/W-1b1

Table 8-18 SHIP_RST Register Field Descriptions

Bit	Field	Type	Reset	Description
7	REG_RST	R/W	1b0	Software Reset 1b0 = Do nothing 1b1 = Software Reset
6-5	EN_RST_SHIP_1:0	R/W	2b00	Shipmode Enable and Hardware Reset 2b00 = Do nothing 2b01 = Enable shutdown mode with wake on adapter insert only 2b10 = Enable shipmode with wake on button press or adapter insert 2b11 = Hardware Reset
4-3	PB_LPRESS_ACTION_1:0	R/W	2b10	Pushbutton long press action 2b00 = Do nothing 2b01 = Hardware Reset 2b10 = Enable shipmode 2b11 = Enable shutdown mode
2	WAKE1_TMR	R/W	1b0	Wake 1 Timer Set 1b0 = 300ms 1b1 = 1s
1	WAKE2_TMR	R/W	1b0	Wake 2 Timer Set 1b0 = 2s 1b1 = 3s
0	EN_PUSH	R/W	1b1	Enable Push Button and Reset Function on Battery Only 1b0 = Disable 1b1 = Enable

8.5.1.11 SYS_REG Register (Offset = 0xA) [Reset = 0x40]

SYS_REG is shown in Figure 8-20 and described in Table 8-19.

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Figure 8-20 SYS_REG Register

7	6	5	4	3	2	1	0
SYS_REG_CTRL_2:0			RESERVED	SYS_MODE_1:0		WATCHDOG_15S_ENABLE	VDPPM_DIS
R/W-3b010			R/W-1b0	R/W-2b00		R/W-1b0	R/W-1b0

Table 8-19 SYS_REG Register Field Descriptions

Bit	Field	Type	Reset	Description
7-5	SYS_REG_CTRL_2:0	R/W	3b010	SYS Regulation Voltgage 3b000 = Battery Tracking Mode 3b001 = 4.4V 3b010 = 4.5V 3b011 = 4.6V 3b100 = 4.7V 3b101 = 4.8V 3b110 = 4.9V 3b111 = Pass-Through (VSYS is VIN)
4	RESERVED	R/W	1b0	Reserved
3-2	SYS_MODE_1:0	R/W	2b00	Sets how SYS is powered in any state, except SHIPMODE 2b00 = SYS powered from VIN if present or VBAT 2b01 = SYS powered from VBAT only, even if VIN present 2b10 = SYS disconnected and left floating 2b11 = SYS disconnected with pulldown
1	WATCHDOG_15S_ENABLE	R/W	1b0	I2C Watchdog 1b0 = Mode Disabled 1b1 = Do a HW reset after 15s if no I2C transaction after VIN plugged
0	VDPPM_DIS	R/W	1b0	Disable VDPPM 1b0 = Enable VDPPM 1b1 = Disable VDPPM

8.5.1.12 TS_CONTROL Register (Offset = 0xB) [Reset = 0x00]

TS_CONTROL is shown in Figure 8-21 and described in Table 8-20.

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Figure 8-21 TS_CONTROL Register

7	6	5	4	3	2	1	0
TS_HOT		TS_COLD		TS_WARM	TS_COOL	TS_ICHG	TS_VRCG
R/W-2b00		R/W-2b00		R/W-1b0	R/W-1b0	R/W-1b0	R/W-1b0

Table 8-20 TS_CONTROL Register Field Descriptions

Bit	Field	Type	Reset	Description
7-6	TS_HOT	R/W	2b00	TS Hot threshold register 2b00 = Default 60C 2b01 = 65C 2b10 = 50C 2b11 = 45C
5-4	TS_COLD	R/W	2b00	TS Cold threshold register 2b00 = Default 0C 2b01 = 3C 2b10 = 5C 2b11 = -3C
3	TS_WARM	R/W	1b0	TS Warm threshold 1b0 = Default 45C 1b1 = Disabled
2	TS_COOL	R/W	1b0	TS Cool threshold register 1b0 = Default 10C 1b1 = Disabled
1	TS_ICHG	R/W	1b0	Fast charge current when decreased by TS function 1b0 = 0.5ICHG 1b1 = 0.2ICHG
0	TS_VRCG	R/W	1b0	Reduced target battery voltage during Warm 1b0 = VBATREG -100mV 1b1 = VBATREG -200mV

8.5.1.13 MASK_ID Register (Offset = 0xC) [Reset = 0xC0]

MASK_ID is shown in Figure 8-22 and described in Table 8-21.

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Figure 8-22 MASK_ID Register

7	6	5	4	3	2	1	0
TS_INT_MASK	TREG_INT_MASK	BAT_INT_MASK	PG_INT_MASK	Device_ID
R/W-1b1	R/W-1b1	R/W-1b0	R/W-1b0	R-4b0000

Table 8-21 MASK_ID Register Field Descriptions

Bit	Field	Type	Reset	Description
7	TS_INT_MASK	R/W	1b1	Mask TS 1b0 = Enable TS Interrupt 1b1 = Mask TS Interrupt
6	TREG_INT_MASK	R/W	1b1	Mask TREG 1b0 = Enable TREG Interrupt 1b1 = Mask TREG Interrupt
5	BAT_INT_MASK	R/W	1b0	Mask BATOCP and BUVLO 1b0 = Enable BOCP and BUVLO Interrupt 1b1 = Mask BOCP and BUVLO Interrupt
4	PG_INT_MASK	R/W	1b0	Mask PG and VINOVP 1b0 = Enable PG and VINOVP Interrupt 1b1 = Mask PG and VINOVP Interrupt
3-0	Device_ID	R	4b0000	Device ID 4b0000 = BQ25180