The integrated ADC is a high-performance, low-offset, low-drift, delta-sigma ADC designed to support bidirectional current flow. The measured inputs are selected through the high-voltage input multiplexer to the ADC inputs as shown in Figure 6-6. The ADC architecture enables lower drift measurement across temperature and consistent offset measurements across the common-mode voltage, temperature, and power supply variations. A low-offset ADC is preferred in current sensing applications to provide a near 0V offset voltage that maximizes the useful dynamic range of the system.

The INA701 measures the die temperature, current, and bus voltage. An internal temperature measurement is made before each current measurement. Temperature compensation is then applied to the current measurement to achieve low drift performance. The MODE bits in the ADC_CONFIG register permit selecting modes to convert only the current or bus voltage to allow the user to configure the monitoring function to fit the specific application requirements. After an ADC conversion is complete, the converted values independently update in the corresponding registers where the values can be read through the digital interface at the time of conversion end if no averaging is selected. The conversion time for shunt voltage, bus voltage, and temperature inputs are set independently from 50µs to 4.12ms depending on the values programmed in the ADC_CONFIG register. The value for current is calculated after both the temperature and shunt voltage measurements are made. The total time to get the current measurement is the sum of the conversion times for these two parameters. Enabled measurement inputs are converted sequentially, which means the total time to convert all inputs depends on the conversion time for each input and the number of inputs enabled. When averaging is used, the intermediate values are subsequently stored in an averaging accumulator, and the conversion sequence repeats until the number of averages is reached. After all of the averaging is complete, the final values are updated in the corresponding registers that can then be read. These values remain in the data output registers until the values are replaced by the next fully completed conversion results. In this case, reading the data output registers does not affect a conversion in progress.

The ADC has two conversion modes—continuous and triggered—set by the MODE bits in the ADC_CONFIG register. In continuous-conversion mode, the ADC continuously converts the input measurements and update the output registers as described above in an indefinite loop. In triggered-conversion mode, the ADC converts the input measurements as described above, after which the ADC goes into shutdown mode until the user writes to the MODE bits to generate another single-shot trigger. Writing the MODE bits interrupts and restarts triggered or continuous conversions that are in progress. Although the device can be read at any time, and the data from the last conversion remains available, the Conversion Ready flag (CNVRF bit in ALERT_DIAG register) is provided to help coordinate triggered conversions. This bit is set after all conversions and averaging are complete.

The Conversion Ready flag (CNVRF) clears under these conditions:

• Writing to the ADC_CONFIG register (except for selecting shutdown mode); or
• Reading the ALERT_DIAG Register

While the INA701 device is used in either one of the conversion modes, a dedicated digital engine is calculating the current, power, charge and energy values in the background (see Internal Measurement and Calculation Engine). In triggered mode, the accumulation registers (ENERGY and CHARGE) are invalid, as the device does not keep track of elapsed time. For applications that require critical measurements in regards to accumulation of time for energy and charge measurements, the device must be configured to use continuous conversion mode, as the accumulated results are continuously updated and can provide true system representation of charge and energy consumption in a system. All of the calculations are performed in the background and do not contribute to conversion time.

For applications that must synchronize with other components in the system, the INA701 conversion can be delayed by programming the CONVDLY bits in CONFIG register in the range between 0ms (no delay) and 510ms. The resolution in programming the conversion delay is 2ms. The conversion delay is set to 0 by default. Conversion delay can assist in measurement synchronization when multiple external devices are used for voltage or current monitoring purposes. In applications where time aligned voltage and current measurements are needed, two devices can be used with the current measurement delayed such that the external voltage and current measurements occurs at approximately the same time. Keep in mind that even though the internal time base for the ADC is precise, synchronization is lost over time due to internal and external time base mismatch.