SNIS244 September   2025 ISOTMP35R

ADVANCE INFORMATION  

  1.   1
  2. Features
  3. Applications
  4. Description
  5. Pin Configuration and Functions
  6. Specifications
    1. 5.1  Absolute Maximum Ratings
    2. 5.2  ESD Ratings
    3. 5.3  Recommended Operating Conditions
    4. 5.4  Thermal Information
    5. 5.5  Insulation Specification
    6. 5.6  Power Ratings
    7. 5.7  Safety-Related Certifications
    8. 5.8  Safety Limiting Values
    9. 5.9  Electrical Characteristics
    10. 5.10 Typical Characteristics
  7. Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Features Description
      1. 6.3.1 Integrated Isolation Barrier and Thermal Response
      2. 6.3.2 Analog Output
        1. 6.3.2.1 Output Accuracy
        2. 6.3.2.2 Drive Capability
        3. 6.3.2.3 Common Mode Transient Immunity (CMTI)
      3. 6.3.3 Thermal Response
    4. 6.4 Device Functional Modes
  8. Application and Implementation
    1. 7.1 Application Information
      1. 7.1.1 External Buffer
      2. 7.1.2 ADC Interface Considerations
      3. 7.1.3 Electromagnetic Noise Mitigation
        1. 7.1.3.1 Filtering Techniques
        2. 7.1.3.2 General Design Guidelines
        3. 7.1.3.3 PCB Layout Practices
      4. 7.1.4 Insulation Lifetime
    2. 7.2 Power Supply Recommendations
      1. 7.2.1 PSRR Considerations
    3. 7.3 Layout
      1. 7.3.1 Layout Guidelines
      2. 7.3.2 Layout Example
  9. Device and Documentation Support
    1. 8.1 Documentation Support
      1. 8.1.1 Related Documentation
    2. 8.2 Receiving Notification of Documentation Updates
    3. 8.3 Support Resources
    4. 8.4 Trademarks
    5. 8.5 Electrostatic Discharge Caution
    6. 8.6 Glossary
  10. Revision History
  11. 10Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
  • DFP|12
Thermal pad, mechanical data (Package|Pins)
Orderable Information

Thermal Information

THERMAL METRIC(1) ISOTMP35R UNIT
DFP (SSOP)
12 PINS
RθJA Junction-to-ambient thermal resistance 99.5 °C/W
RθJC(top) Junction-to-case (top) thermal resistance 127.6 °C/W
RθJC(bot) Junction-to-case (bottom) thermal resistance °C/W
RθJB Junction-to-board thermal resistance 74.1 °C/W
ψJT Junction-to-top characterization parameter 92.6 °C/W
ψJB Junction-to-board characterization parameter 73.4 °C/W
MT Thermal Mass TBD mJ/°C
For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application note.