SBOS263H October   2002  – December 2024 OPA830

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Device Comparison Table
  6. 5 Pin Configurations
  7. 6 Specifications
    1. 6.1  Absolute Maximum Ratings
    2. 6.2  ESD Ratings
    3. 6.3  Recommended Operating Conditions
    4. 6.4  Thermal Information
    5. 6.5  Electrical Characteristics for D Package VS = ±5V
    6. 6.6  Electrical Characteristics for D Package VS = 5V
    7. 6.7  Electrical Characteristics for D Package VS = 3V
    8. 6.8  Electrical Characteristics for DBV Package VS = ±5V
    9. 6.9  Electrical Characteristics for DBV Package VS = 5V
    10. 6.10 Electrical Characteristics for DBV Package VS = 3V
    11. 6.11 Typical Characteristics: VS = ±5V
    12. 6.12 Typical Characteristics: VS = ±5V, Differential Configuration
    13. 6.13 Typical Characteristics: VS = 5V
    14. 6.14 Typical Characteristics: VS = 5V, Differential Configuration
    15. 6.15 Typical Characteristics: VS = 3V
    16. 6.16 Typical Characteristics: VS = 3V, Differential Configuration
  8. 7 Parameter Measurement Information
  9. 8 Application and Implementation
    1. 8.1 Application Information
      1. 8.1.1  Wideband Voltage-Feedback Operation
      2. 8.1.2  DC Level-Shifting
      3. 8.1.3  Optimizing Resistor Values
      4. 8.1.4  Bandwidth Versus Gain: Noninverting Operation
      5. 8.1.5  Inverting Amplifier Operation
      6. 8.1.6  Output Current and Voltages
      7. 8.1.7  Driving Capacitive Loads
      8. 8.1.8  Distortion Performance
      9. 8.1.9  Noise Performance
      10. 8.1.10 DC Accuracy and Offset Control
      11. 8.1.11 Thermal Analysis
    2. 8.2 Typical Applications
      1. 8.2.1 Single-Supply ADC Interface
      2. 8.2.2 AC-Coupled Output Video Line Driver
      3. 8.2.3 Noninverting Amplifier With Reduced Peaking
      4. 8.2.4 Single-Supply Active Filter
    3. 8.3 Layout
      1. 8.3.1 Layout Guidelines
        1. 8.3.1.1 Input and ESD Protection
  10. 9 Device and Documentation Support
    1. 9.1 Device Support
      1. 9.1.1 Development Support
        1. 9.1.1.1 Demonstration Boards
        2. 9.1.1.2 Macromodel and Applications Support
    2. 9.2 Receiving Notification of Documentation Updates
    3. 9.3 Support Resources
    4. 9.4 Trademarks
    5. 9.5 Electrostatic Discharge Caution
    6. 9.6 Glossary
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • D|8
  • DBV|5
Thermal pad, mechanical data (Package|Pins)
Orderable Information

8.1.2 DC Level-Shifting

Figure 8-4 shows a dc-coupled non inverting amplifier that level-shifts the input up to accommodate the desired output voltage range. Given the desired signal gain (G), and the amount VOUT needs to be shifted up (ΔVOUT) when VIN is at the center of the range, the following equations give the resistor values that produce the desired performance. Assume that R4 is between 200Ω and 1.5kΩ.

NG = G + VOUT / VS

R1 = R4 / G

R2 = R4 / (NG – G)

R3 = R4 / (NG – 1)

where:

NG = 1 + R4 / R3

VOUT = (G)VIN + (NG – G)VS

Make sure that VIN and VOUT stay within the specified input and output voltage ranges.

OPA830 DC Level-Shifting Figure 8-4 DC Level-Shifting

The circuit on the front page is a good example of this type of application. The circuit is designed to take VIN between 0V and 0.5V and produce VOUT between 1V and 2V when using a 3V supply. This configuration means G = 2.00, and ΔVOUT = 1.50V – G × 0.25V = 1.00V. Plugging these values into the previous equations (with R4 = 750Ω) gives: NG = 2.33, R1 = 375Ω, R2 = 2.25kΩ, and R3 = 563Ω. The resistors changed to the nearest standard values for the front-page circuit.