All audio data converters require a DC reference voltage. The PCM6xx0-Q1 family achieves its low-noise performance by internally generating a low-noise reference voltage. This reference voltage is generated using a band-gap circuit with good PSRR performance. This audio converter reference voltage must be filtered externally using a minimum 1-µF capacitor connected from the VREF pin to the analog ground (AVSS).
To achieve low power consumption, this audio reference block is powered down in sleep mode or software shutdown; see the Sleep Mode or Software Shutdown section for more details. When exiting sleep mode, the audio reference block is powered up using internal fast-charge scheme and the VREF pin settles to its steady-state voltage after the settling time (a function of the decoupling capacitor on the VREF pin). This time is approximately equal to 3.5 ms when using a 1-μF decoupling capacitor. If a higher value of the decoupling capacitor is used on the VREF pin, the fast-charge setting must be reconfigured using the VREF_QCHG, P0_R2_D[4:3] register bits, which support options of 3.5 ms (default), 10 ms, 50 ms, or 100 ms.