184.108.40.206 LPDDR2 Interface Schematic
Figure 8-24 shows the schematic connections for 32-bit interface with or without ECC using one x32 LPDDR2 device.
Figure 8-24 32-Bit Interface with and without ECC using one x32 LPDDR2 device(1)(3)(4)
- When LPDDR2 memory are used, these signal function as ddr1_ca[9:0]. For more information, see Table 4-11, EMIF1 Signal Descriptions
- Rca is 10 Ω resistor and is to be placed near TDA3x device.
- The RDAT is 22 Ω resistor and is to be placed near TDA3x device
- If ECC is required, pins available behind data lane 3 (data would then only use 16bit (lanes 1 and 2))
When not using a part of LPDDR2 interface (using x16 or not using the LPDDR2 interface):
- Connect the vdds_ddr supply to 1.8 V
- Tie off ddr1_dqsx (x=0,1,2,3) that are unused to vss via 1 kΩ
- Tie off ddr1_dqsnx (x=0,1,2,3) that are unused to vdds_ddr via 1 kΩ
- All other unused pins can be left as NC.
Note: All the unused DDR ADDR_CTRL lines used for DDR3 operation should be left as NC.