SLOS224J July   1999  – February 2024 THS4031 , THS4032

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1  Absolute Maximum Ratings
    2. 5.2  ESD Ratings
    3. 5.3  Recommended Operating Conditions
    4. 5.4  Thermal Information: THS4031
    5. 5.5  Thermal Information: THS4032
    6. 5.6  Electrical Characteristics: THS4031, RL = 150 Ω
    7. 5.7  Electrical Characteristics: THS4031, RL = 1 kΩ
    8. 5.8  Electrical Characteristics: THS4032, RL = 150 Ω
    9. 5.9  Electrical Characteristics: THS4032, RL = 1 kΩ
    10. 5.10 Typical Characteristics: THS4031
    11. 5.11 Typical Characteristics: THS4032
  7. 6 Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagrams
    3. 6.3 Feature Description
      1. 6.3.1 Offset Nulling
    4. 6.4 Device Functional Modes
  8. 7 Application and Implementation
    1. 7.1 Application Information
      1. 7.1.1 Driving a Capacitive Load
      2. 7.1.2 Low-pass Filter Configurations
    2. 7.2 Typical Application
      1. 7.2.1 Design Requirements
      2. 7.2.2 Detailed Design Procedure
        1. 7.2.2.1 Selection of Multiplexer
        2. 7.2.2.2 Signal Source
        3. 7.2.2.3 Driving Amplifier
        4. 7.2.2.4 Driving Amplifier Bandwidth Restriction
      3. 7.2.3 Application Curves
    3. 7.3 Power Supply Recommendations
    4. 7.4 Layout
      1. 7.4.1 Layout Guidelines
        1. 7.4.1.1 General PowerPAD™ Design Considerations
      2. 7.4.2 Layout Example
  9. 8 Device and Documentation Support
    1. 8.1 Documentation Support
      1. 8.1.1 Related Documentation
    2. 8.2 Receiving Notification of Documentation Updates
    3. 8.3 Support Resources
    4. 8.4 Trademarks
    5. 8.5 Electrostatic Discharge Caution
    6. 8.6 Glossary
  10. 9 Revision History
  11. 10Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

7.2.2.1 Selection of Multiplexer

Figure 7-5 shows an equivalent circuit diagram of one of the channels of a multiplexer. CS is the input capacitance of the channel; CD is the output capacitance of the channel. RON is the resistance of the channel when the channel is turned ON. CL and RL are the load capacitance and resistance, respectively. VIN is the input voltage of the source. RS is the resistance of the source. VOUT is the output voltage of the multiplexer.

GUID-9F7358AA-8C3C-4B96-A429-756B3AE3B1A9-low.gifFigure 7-5 Multiplexer Equivalent Circuit

Settling time is improved when the values of RS, RON, CS, CD, and CL are small, and the value of RL is large.

For TS5A3159:

  • RON = 1 Ω
  • CS = CD = 84 pF

Typical values for the extrinsic parameters are

  • RS = 50 Ω
  • CL = 5 pF
  • RL = 10 kΩ
  • TRC (time constant) = 8.65 ns

For a 16-bit system, at least 18-bit settling is desired to minimize distortion from settling artifacts. For an 18-bit settling, the circuit response time required is (18 × ln2) × TRC = 108 ns, which is less than 2 MSPS sampling time of 500 ns. If the settling time is more than the conversion time of the ADC, the output of the multiplexer does not settle to the required accuracy resulting in distortion.

One more important parameter to consider when selecting a multiplexer is the on-state resistance variation with voltage. This variation also affects distortion because RON and RL act like a resistor divider circuit. Any variation of RON with voltage affects the output voltage.