SBOS891C October   2018  – September 2023 TMP144

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Revision History
  6. 5 Pin Configuration and Functions
  7. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 UART Interface Timing
    7. 6.7 Timing Diagrams
    8. 6.8 Typical Characteristics
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Power Up
      2. 7.3.2 Digital Temperature Output
      3. 7.3.3 Timeout Function
    4. 7.4 Device Functional Modes
      1. 7.4.1 Continuous Conversion Mode
      2. 7.4.2 Shutdown Mode
      3. 7.4.3 One-Shot Mode
      4. 7.4.4 Extended Temperature Mode
      5. 7.4.5 Temperature Alert Function
      6. 7.4.6 Interrupt Functionality
    5. 7.5 SMAART Wire / UART Interface
      1. 7.5.1 Communication Protocol
      2. 7.5.2 Global Software Reset
      3. 7.5.3 Global Initialization and Address Assignment Sequence
      4. 7.5.4 Global Clear Interrupt
      5. 7.5.5 Global Read and Write
      6. 7.5.6 Individual Read and Write
    6. 7.6 Register Maps
      1. 7.6.1 Temperature Result Register (P[1:0] = 00) [reset = 0000h]
      2. 7.6.2 Configuration Register (P[1:0] = 01) [reset = 0200h]
      3. 7.6.3 Temperature Low Limit Register (P[1:0] = 10) [reset = F600h]
      4. 7.6.4 Temperature High Limit Register (P[1:0] = 11) [reset = 3C00h]
  9. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Trace Length
        2. 8.2.2.2 Voltage Drop Effect
        3. 8.2.2.3 Power Supply Noise Filtering
      3. 8.2.3 Application Curves
    3. 8.3 Power Supply Recommendations
    4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
      2. 8.4.2 Layout Example
  10. 9 Device and Documentation Support
    1. 9.1 Device Support
      1. 9.1.1 Device Nomenclature
    2. 9.2 Receiving Notification of Documentation Updates
    3. 9.3 Support Resources
    4. 9.4 Trademarks
    5. 9.5 Electrostatic Discharge Caution
    6. 9.6 Glossary
  11. 10Mechanical, Packaging, and Orderable Information

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • YBK|4
  • YFF|4
  • YMT|4
Thermal pad, mechanical data (Package|Pins)
Orderable Information

6.5 Electrical Characteristics

Over free-air temperature range and V+ = 1.4 V to 3.6 V (unless otherwise noted); Typical specifications are at TA = 25°C and V+ = 3.3 V (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
TEMPERATURE SENSOR
TERR(1) Temperature accuracy V+ = 3.3 V, TA = –10°C to 100 °C ±0.5 ±1.0 °C
Temperature accuracy V+ = 1.4 V to 3.6 V, TA = –40°C to 125°C ±1.0 ±2.0 °C
PSR DC power supply rejection  One-shot mode ±0.2 ±0.5 °C/V
TRES Temperature resolution Including sign bit 12 Bits
LSB 62.5 m°C
tCONV Conversion time One-shot mode 26 35 ms
tCONV_P Conversion Period CR1 = 0, CR0 = 0 (default) 4 s
CR1 = 0, CR0 = 1 1 s
CR1 = 1, CR0 = 0 0.25 s
CR1 = 1, CR0 = 1 0.125 s
DIGITAL INPUT/OUTPUT
CIN Input capacitance 5 pF
VIH Input logic high level RX 0.7 × (V+) (V+) + 0.3 V
VIL Input logic low level RX –0.5 0.3 × (V+) V
IIN Input leakage current 0 ≤ VIN ≤ (V+) + 0.3 V –1 1 μA
VOL Output low level TX, V+ > 2 V, IOH = 1 mA 0 0.4 V
TX, V+ < 2 V, IOH = 1 mA 0 0.2 × (V+) V
VOH Output high level TX, V+ > 2 V, IOL = 1 mA (V+) – 0.4 V+ V
TX, V+ < 2 V, IOL = 1 mA 0.8 × (V+) V+ V
POWER SUPPLY
IDD_ACTIVE Supply current during active conversion V+ = 3.3 V, Active Conversion, serial bus inactive 44 100 μA
IDD_AVG Average current consumption V+ = 3.3 V, CR1 = 0, CR0 = 0 (default) Serial bus inactive 3 10 μA
Serial bus active 53
IDD_SB Standby current(2) V+ = 3.3 V, Serial bus inactive 2.5 9.5 μA
IDD_SD Shutdown current V+ = 3.3 V, Serial bus inactive 0.6 5 μA
VPOR Power-on reset threshold voltage Supply rising 0.9 V
tRAMP_VDD VDD ramp time requirements Supply rising or falling 1 ms
(1) Does not include effects of self heating.
(2) Quiescent current between conversions