SLUSBX9I March 2014 – July 2019 TPS23861
A programmable timer is provided with range selectable from 10 ms to 150 ms in 10 ms increments. Timer duration is programmed via the four-bit field TMR [3:0] in the Interrupt Timer Register. Non-critical interrupts will be deferred from asserting an interrupt on the INT pin until the timer times out. Critical interrupts such as faults will not be affected by the state of this timer. Critical vs. deferrable interrupts are identified in Table 6. The behavior of the various interrupt enable bits is not affected by the timer function.
|INTERRUPT BIT||FUNCTION||CRITICAL OR DEFERRABLE|
|SUPF||Supply or thermal fault||Critical|
|IFAULT||ICUT or ILIM fault||Critical|
|CLASC||A classification event occurred||Deferrable|
|DETC||A detection event occurred||Deferrable|
|DISF||A disconnect event occurred||Deferrable|
|PGC||Power good status change||Deferrable|
|PEC||Power enable status change||Deferrable|
If the counter is loaded with 0000 (POR state) the counter will not count, and no interrupts will be deferred. That is, this function will be disabled.