SLVSHN0A September   2024  – October 2025 TPS548B23

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 Typical Characteristics
  7. 6 Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
      1. 6.3.1  D-CAP4 Control
      2. 6.3.2  Internal VCC LDO and Using External Bias On the VCC Pin
        1. 6.3.2.1 Powering the Device From a Single Bus
        2. 6.3.2.2 Powering the Device From a Split-Rail Configuration
      3. 6.3.3  Multifunction Configuration (CFG1-5) Pins
        1. 6.3.3.1 Multifunction Configuration (CFG1-2) Pins (Internal Feedback)
        2. 6.3.3.2 Multifunction Configuration (CFG1-2) Pins (External Feedback)
        3. 6.3.3.3 Multifunction Configuration (CFG3-5) Pins
      4. 6.3.4  Enable
      5. 6.3.5  Soft Start
      6. 6.3.6  Power Good
      7. 6.3.7  Overvoltage and Undervoltage Protection
      8. 6.3.8  Output Voltage Setting (External Feedback Configuration)
      9. 6.3.9  Remote Sense
      10. 6.3.10 Low-side MOSFET Zero-Crossing
      11. 6.3.11 Current Sense and Positive Overcurrent Protection
      12. 6.3.12 Low-side MOSFET Negative Current Limit
      13. 6.3.13 Output Voltage Discharge
      14. 6.3.14 UVLO Protection
      15. 6.3.15 Thermal Shutdown
    4. 6.4 Device Functional Modes
      1. 6.4.1 Auto-Skip (PFM) Eco-mode Light Load Operation
      2. 6.4.2 Forced Continuous-Conduction Mode
  8. 7 Application and Implementation
    1. 7.1 Application Information
    2. 7.2 Typical Application
      1. 7.2.1 Design Requirements
      2. 7.2.2 Detailed Design Procedure
        1. 7.2.2.1 Output Voltage Setting Point
        2. 7.2.2.2 Choose the Switching Frequency
        3. 7.2.2.3 Choose the Inductor
        4. 7.2.2.4 Choose the Output Capacitor
        5. 7.2.2.5 Choose the Input Capacitors (CIN)
        6. 7.2.2.6 VCC Bypass Capacitor
        7. 7.2.2.7 BOOT Capacitor
        8. 7.2.2.8 PG Pullup Resistor
      3. 7.2.3 Application Curves
    3. 7.3 Power Supply Recommendations
    4. 7.4 Layout
      1. 7.4.1 Layout Guidelines
      2. 7.4.2 Layout Example
  9. 8 Device and Documentation Support
    1. 8.1 Documentation Support
      1. 8.1.1 Related Documentation
    2. 8.2 Receiving Notification of Documentation Updates
    3. 8.3 Support Resources
    4. 8.4 Trademarks
    5. 8.5 Electrostatic Discharge Caution
    6. 8.6 Glossary
  10. 9 Revision History
  11. 10Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

6.3.3.3 Multifunction Configuration (CFG3-5) Pins

The CFG3-5 pins select the device output voltage configuration as well as FCCM or PFM operation based on the following table.

Table 6-4 CFG 3-5 Pin Selection Table
CFG3 CFG4 CFG5 VFB CONFIG VOUT(V) FSW MODE
VCC VCC VCC internal 5.0 FCCM
VCC GND VCC internal 3.3 FCCM
VCC Float VCC internal 2.5 FCCM
VCC VCC GND internal 1.8 FCCM
VCC GND GND internal 1.5 FCCM
VCC Float GND internal 1.2 FCCM
VCC VCC Float internal 1.1 FCCM
VCC GND Float internal 1.05 FCCM
VCC Float Float internal 1.0 FCCM
GND VCC VCC internal 0.95 FCCM
GND GND VCC internal 0.9 FCCM
GND Float VCC internal 0.85 FCCM
GND VCC GND internal 0.8 FCCM
GND GND GND external 0.5 FCCM
GND Float GND internal 5.0 PFM
GND VCC Float internal 3.3 PFM
GND GND Float internal 2.5 PFM
GND Float Float internal 1.8 PFM
Float VCC VCC internal 1.5 PFM
Float GND VCC internal 1.2 PFM
Float Float VCC internal 1.1 PFM
Float VCC GND internal 1.0 PFM
Float GND GND internal 0.95 PFM
Float Float GND internal 0.9 PFM
Float VCC Float internal 0.85 PFM
Float GND Float internal 0.8 PFM
Float Float Float external 0.5 PFM