SLVSHN0A September   2024  – October 2025 TPS548B23

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 Typical Characteristics
  7. 6 Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
      1. 6.3.1  D-CAP4 Control
      2. 6.3.2  Internal VCC LDO and Using External Bias On the VCC Pin
        1. 6.3.2.1 Powering the Device From a Single Bus
        2. 6.3.2.2 Powering the Device From a Split-Rail Configuration
      3. 6.3.3  Multifunction Configuration (CFG1-5) Pins
        1. 6.3.3.1 Multifunction Configuration (CFG1-2) Pins (Internal Feedback)
        2. 6.3.3.2 Multifunction Configuration (CFG1-2) Pins (External Feedback)
        3. 6.3.3.3 Multifunction Configuration (CFG3-5) Pins
      4. 6.3.4  Enable
      5. 6.3.5  Soft Start
      6. 6.3.6  Power Good
      7. 6.3.7  Overvoltage and Undervoltage Protection
      8. 6.3.8  Output Voltage Setting (External Feedback Configuration)
      9. 6.3.9  Remote Sense
      10. 6.3.10 Low-side MOSFET Zero-Crossing
      11. 6.3.11 Current Sense and Positive Overcurrent Protection
      12. 6.3.12 Low-side MOSFET Negative Current Limit
      13. 6.3.13 Output Voltage Discharge
      14. 6.3.14 UVLO Protection
      15. 6.3.15 Thermal Shutdown
    4. 6.4 Device Functional Modes
      1. 6.4.1 Auto-Skip (PFM) Eco-mode Light Load Operation
      2. 6.4.2 Forced Continuous-Conduction Mode
  8. 7 Application and Implementation
    1. 7.1 Application Information
    2. 7.2 Typical Application
      1. 7.2.1 Design Requirements
      2. 7.2.2 Detailed Design Procedure
        1. 7.2.2.1 Output Voltage Setting Point
        2. 7.2.2.2 Choose the Switching Frequency
        3. 7.2.2.3 Choose the Inductor
        4. 7.2.2.4 Choose the Output Capacitor
        5. 7.2.2.5 Choose the Input Capacitors (CIN)
        6. 7.2.2.6 VCC Bypass Capacitor
        7. 7.2.2.7 BOOT Capacitor
        8. 7.2.2.8 PG Pullup Resistor
      3. 7.2.3 Application Curves
    3. 7.3 Power Supply Recommendations
    4. 7.4 Layout
      1. 7.4.1 Layout Guidelines
      2. 7.4.2 Layout Example
  9. 8 Device and Documentation Support
    1. 8.1 Documentation Support
      1. 8.1.1 Related Documentation
    2. 8.2 Receiving Notification of Documentation Updates
    3. 8.3 Support Resources
    4. 8.4 Trademarks
    5. 8.5 Electrostatic Discharge Caution
    6. 8.6 Glossary
  10. 9 Revision History
  11. 10Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

6.3.3.2 Multifunction Configuration (CFG1-2) Pins (External Feedback)

When the device is configured for external feedback operation with the CFG 3-5 pins (see Table 6-4), the switching frequency, fault recovery mode, overcurrent threshold, and soft-start time are programmed by connecting resistors between the CFG1-2 pins and AGND. A ±1% tolerance resistor with a typical temperature coefficient of ±100ppm/°C is required for accurate detection across the device operating range.

The switching frequency, fault recovery mode, and soft-start time are programmed by connecting a resistor between the CFG1 pin and AGND based on the following table:

Table 6-3 CFG1 Pin Selection Table (External Feedback Configuration)
CFG1 PIN RESISTANCE TO AGND (kΩ) SWITCHING FREQUENCY (fSW) (kHz)(1) FAULT RECOVERY MODE SOFT-START TIME (ms)
0 (GND) 600 Hiccup 1
4.99 800 Hiccup 1
7.50 1000 Hiccup 1
10.5 1200 Hiccup 1
13.3 600 Latch Off 1
16.9 800 Latch Off 1
21.0 1000 Latch Off 1
24.9 1200 Latch Off 1
30.1 600 Hiccup 2
35.7 800 Hiccup 2
42.2 1000 Hiccup 2
48.7 1200 Hiccup 2
56.2 600 Latch Off 2
64.9 800 Latch Off 2
75.0 1000 Latch Off 2
86.6 1200 Latch Off 2
102 600 Hiccup 3
118 800 Hiccup 3
137 1000 Hiccup 3
158 1200 Hiccup 3
182 600 Latch Off 3
210 800 Latch Off 3
243 1000 Latch Off 3
≥280 (FLOAT) 1200 Latch Off 3
(1) Switching frequency is based on 3.3V output voltage. Frequency varies with output voltage.

The valley overcurrent protection is programmed with resistor (RILIM) between CFG2 and AGND using based on Equation 4.

Equation 3. I L I M _ V A L L E Y = K O C L R I L I M
Equation 4. R I L I M = K O C L I L I M _ V A L L E Y

where

  • ILIM_VALLEY is valley overcurrent limit threshold for load current in A
  • RILIM is ILIM resistor value in Ω
  • KOCL is a constant of 91.2 × 103 for the calculation
Additionally, use Equation 6 to calculate the maximum output current for a given ILIM_VALLEY setting.
Equation 5. I O U T _ M A X = I L I M _ V A L L E Y + 1 2 × I R I P P L E
Equation 6. I O U T _ M A X = I L I M _ V A L L E Y + 1 2 × V I N - V O × V O V I N × 1 L × f S W
where
  • IOUT_MAX is the maximum output current in A
  • ILIM_VALLEY is valley overcurrent limit threshold for load current in A
  • VIN is input voltage value in V
  • VO is output voltage value in V
  • L is output inductor value in µH
  • fSW is switching frequency in MHz
Note: TI recommends a ±1% tolerance resistor because a worse tolerance resistor provides less accurate OCL threshold.

To protect the device from an unexpected connection to the ILIM pin, an internal fixed OCL clamp is implemented. This internal OCL clamp limits the maximum valley current on the low-side MOSFET to 21A when the ILIM pin has too small of a resistance to AGND, or is accidentally shorted to ground.