SNVSAU8 June   2017 TPS549B22

PRODUCTION DATA.  

  1. Features
  2. Applications
  3. Description
    1.     Device Images
      1.      Simplified Application
  4. Revision History
  5. Pin Configuration and Functions
    1.     Pin Functions
  6. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  7. Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 25-A FET
      2. 7.3.2 On-Resistance
      3. 7.3.3 Package Size, Efficiency and Thermal Performance
      4. 7.3.4 Soft-Start Operation
      5. 7.3.5 VDD Supply Undervoltage Lockout (UVLO) Protection
      6. 7.3.6 EN_UVLO Pin Functionality
      7. 7.3.7 Fault Protections
        1. 7.3.7.1 Current Limit (ILIM) Functionality
        2. 7.3.7.2 VDD Undervoltage Lockout (UVLO)
        3. 7.3.7.3 Overvoltage Protection (OVP) and Undervoltage Protection (UVP)
        4. 7.3.7.4 Out-of-Bounds Operation
        5. 7.3.7.5 Overtemperature Protection
    4. 7.4 Device Functional Modes
      1. 7.4.1 DCAP3 Control Topology
      2. 7.4.2 DCAP Control Topology
    5. 7.5 Programming
      1. 7.5.1 Programmable Pin-Strap Settings
        1. 7.5.1.1 Address Selection (ADDR) Pin
        2. 7.5.1.2 VSEL Pin
        3. 7.5.1.3 DCAP3 Control and Mode Selection
        4. 7.5.1.4 Application Workaround to Support 4-ms and 8-ms SS Settings
      2. 7.5.2 Programmable Analog Configurations
        1. 7.5.2.1 RSP/RSN Remote Sensing Functionality
          1. 7.5.2.1.1 Output Differential Remote Sensing Amplifier
        2. 7.5.2.2 Power Good (PGOOD Pin) Functionality
      3. 7.5.3 PMBus Programming
        1. 7.5.3.1 TPS549B22 Limitations to the PMBUS Specifications
        2. 7.5.3.2 Slave Address Assignment
        3. 7.5.3.3 PMBUS Address Selection
        4. 7.5.3.4 Supported Formats
          1. 7.5.3.4.1 Direct Format — Write
          2. 7.5.3.4.2 Combined Format — Read
        5. 7.5.3.5 Stop Separated Reads
        6. 7.5.3.6 Supported PMBUS Commands and Registers
    6. 7.6 Register Maps
      1. 7.6.1  OPERATION Register (address = 1h)
        1. Table 9. OPERATION
      2. 7.6.2  ON_OFF_CONFIG Register (address = 2h)
        1. Table 10. ON_OFF_CONFIG
      3. 7.6.3  CLEAR FAULTS (address = 3h)
      4. 7.6.4  WRITE PROTECT (address = 10h)
        1. Table 11. WRITE PROTECT
      5. 7.6.5  STORE_DEFAULT_ALL (address = 11h)
      6. 7.6.6  RESTORE_DEFAULT_ALL (address = 12h)
      7. 7.6.7  CAPABILITY (address = 19h)
        1. Table 12. CAPABILITY
      8. 7.6.8  VOUT_MODE (address = 20h)
        1. Table 13. VOUT_MODE
      9. 7.6.9  VOUT_COMMAND (address = 21h)
        1. Table 14. VOUT_COMMAND
      10. 7.6.10 VOUT_MARGIN_HIGH (address = 25h) ®
        1. Table 15. VOUT_MARGIN_HIGH
      11. 7.6.11 VOUT_MARGIN_LOW (address = 26h)
        1. Table 16. VOUT_MARGIN_LOW:
      12. 7.6.12 STATUS_BYTE (address = 78h)
        1. Table 17. STATUS_BYTE
      13. 7.6.13 STATUS_WORD (High Byte) (address = 79h)
        1. Table 18. STATUS_WORD (High Byte)
      14. 7.6.14 STATUS_VOUT (address = 7Ah)
        1. Table 19. STATUS_VOUT
      15. 7.6.15 STATUS_IOUT (address = 7Bh)
        1. Table 20. STATUS_IOUT
      16. 7.6.16 STATUS_CML (address = 7Eh)
        1. Table 21. STATUS_CML
      17. 7.6.17 MFR_SPECIFIC_00 (address = D0h)
        1. Table 22. MFR_SPECIFIC_00
      18. 7.6.18 MFR_SPECIFIC_01 (address = D1h)
        1. Table 23. MFR_SPECIFIC_01
      19. 7.6.19 MFR_SPECIFIC_02 (address = D2h)
        1. Table 26. MFR_SPECIFIC_02
      20. 7.6.20 MFR_SPECIFIC_03 (address = D3h)
        1. Table 28. MFR_SPECIFIC_03 Field Descriptions
      21. 7.6.21 MFR_SPECIFIC_04 (address = D4h)
        1. Table 31. MFR_SPECIFIC_04
      22. 7.6.22 MFR_SPECIFIC_06 (address = D6h)
        1. Table 33. MFR_SPECIFIC_06
      23. 7.6.23 MFR_SPECIFIC_07 (address = D7h)
        1. Table 35. MFR_SPECIFIC_07
      24. 7.6.24 MFR_SPECIFIC_44 (address = FCh)
        1. Table 37. MFR_SPECIFIC_44
  8. Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Applications
      1. 8.2.1 TPS549B22 1.5-V to 18-V Input, 1-V Output, 25-A Converter
      2. 8.2.2 Design Requirements
      3. 8.2.3 Detailed Design Procedure
        1. 8.2.3.1  Custom Design With WEBENCH® Tools
        2. 8.2.3.2  Switching Frequency Selection
        3. 8.2.3.3  Inductor Selection
        4. 8.2.3.4  Output Capacitor Selection
          1. 8.2.3.4.1 Minimum Output Capacitance to Ensure Stability
          2. 8.2.3.4.2 Response to a Load Transient
          3. 8.2.3.4.3 Output Voltage Ripple
        5. 8.2.3.5  Input Capacitor Selection
        6. 8.2.3.6  Bootstrap Capacitor Selection
        7. 8.2.3.7  BP Pin
        8. 8.2.3.8  R-C Snubber and VIN Pin High-Frequency Bypass
        9. 8.2.3.9  Optimize Reference Voltage (VSEL)
        10. 8.2.3.10 MODE Pin Selection
        11. 8.2.3.11 ADDR Pin Selection
        12. 8.2.3.12 Overcurrent Limit Design
      4. 8.2.4 Application Curves
  9. Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Examples
    3. 10.3 Mounting and Thermal Profile Recommendation
  11. 11Device and Documentation Support
    1. 11.1 Device Support
      1. 11.1.1 Development Support
        1. 11.1.1.1 Custom Design With WEBENCH® Tools
    2. 11.2 Documentation Support
      1. 11.2.1 Related Documentation
    3. 11.3 Receiving Notification of Documentation Updates
    4. 11.4 Community Resources
    5. 11.5 Trademarks
    6. 11.6 Electrostatic Discharge Caution
    7. 11.7 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • RVF|40
Thermal pad, mechanical data (Package|Pins)
Orderable Information

Features

  • Input Voltage (PVIN): 1.5 V to 18 V
  • Input Bias Voltage (VDD) Range: 4.5 V to 22 V
  • Output Voltage Range: 0.6 V to 5.5 V
  • Integrated, 4.1-mΩ and 1.9-mΩ Power MOSFETs With 25-A Continuous Output Current
  • Voltage Reference 0.6 V to 1.2 V in 50-mV Steps Using VSEL Pin
  • ±0.5%, 0.9-VREF Tolerance Range: –40°C to +125°C Junction Temperature
  • True Differential Remote Sense Amplifier
  • D-CAP3™ Control Loop
  • Adaptive On-Time Control with 8 PMBusTM Frequencies: 315 kHz, 425 kHz, 550 kHz, 650 kHz, 825 kHz, 900 kHz, 1.025 MHz, 1.125 MHz
  • Temperature Compensated and Programmable Current Limit with RILIM and OC Clamp
  • Choice of Hiccup or Latch-Off OVP or UVP
  • VDD UVLO External Adjustment by Precision EN
  • Prebias Start-up Support
  • Eco-mode™ and FCCM Selectable
  • Full Suite of Fault Protection and PGOOD
  • Standard VOUT_COMMAND and VOUT_MARGIN (HIGH and LOW)
  • Pin-Strapping and On-the-Fly Programming
  • Fault Reporting and Warning
  • NVM Backup for Selected Commands
  • 1-MHz PMBus with PEC and SMB_ALRT#
  • Create a Custom Design Using the TPS549B22 With the WEBENCH® Power Designer