SNVSAU8A June   2017  – February 2024 TPS549B22

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 Typical Characteristics
  7. 6 Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
      1. 6.3.1 25-A FET
      2. 6.3.2 On-Resistance
      3. 6.3.3 Package Size, Efficiency and Thermal Performance
      4. 6.3.4 Soft-Start Operation
      5. 6.3.5 VDD Supply Undervoltage Lockout (UVLO) Protection
      6. 6.3.6 EN_UVLO Pin Functionality
      7. 6.3.7 Fault Protections
        1. 6.3.7.1 Current Limit (ILIM) Functionality
        2. 6.3.7.2 VDD Undervoltage Lockout (UVLO)
        3. 6.3.7.3 Overvoltage Protection (OVP) and Undervoltage Protection (UVP)
        4. 6.3.7.4 Out-of-Bounds Operation
        5. 6.3.7.5 Overtemperature Protection
    4. 6.4 Device Functional Modes
      1. 6.4.1 D-CAP3™ Control Mode Topology
      2. 6.4.2 DCAP Control Topology
    5. 6.5 Programming
      1. 6.5.1 Programmable Pin-Strap Settings
        1. 6.5.1.1 Address Selection (ADDR) Pin
        2. 6.5.1.2 VSEL Pin
        3. 6.5.1.3 D-CAP3™ Control Mode Selection
        4. 6.5.1.4 Application Workaround to Support 4-ms and 8-ms SS Settings
      2. 6.5.2 Programmable Analog Configurations
        1. 6.5.2.1 RSP/RSN Remote Sensing Functionality
          1. 6.5.2.1.1 Output Differential Remote Sensing Amplifier
        2. 6.5.2.2 Power Good (PGOOD Pin) Functionality
      3. 6.5.3 PMBus Programming
        1. 6.5.3.1 TPS549B22 Limitations to the PMBUS Specifications
        2. 6.5.3.2 Target Address Assignment
        3. 6.5.3.3 PMBUS Address Selection
        4. 6.5.3.4 Supported Formats
          1. 6.5.3.4.1 Direct Format — Write
          2. 6.5.3.4.2 Combined Format — Read
        5. 6.5.3.5 Stop Separated Reads
        6. 6.5.3.6 Supported PMBUS Commands and Registers
  8. 7 Register Maps
    1. 7.1  OPERATION Register (address = 1h)
    2. 7.2  ON_OFF_CONFIG Register (address = 2h)
    3. 7.3  CLEAR FAULTS (address = 3h)
    4. 7.4  WRITE PROTECT (address = 10h)
    5. 7.5  STORE_DEFAULT_ALL (address = 11h)
    6. 7.6  RESTORE_DEFAULT_ALL (address = 12h)
    7. 7.7  CAPABILITY (address = 19h)
    8. 7.8  VOUT_MODE (address = 20h)
    9. 7.9  VOUT_COMMAND (address = 21h)
    10. 7.10 VOUT_MARGIN_HIGH (address = 25h) ®
    11. 7.11 VOUT_MARGIN_LOW (address = 26h)
    12. 7.12 STATUS_BYTE (address = 78h)
    13. 7.13 STATUS_WORD (High Byte) (address = 79h)
    14. 7.14 STATUS_VOUT (address = 7Ah)
    15. 7.15 STATUS_IOUT (address = 7Bh)
    16. 7.16 STATUS_CML (address = 7Eh)
    17. 7.17 MFR_SPECIFIC_00 (address = D0h)
    18. 7.18 MFR_SPECIFIC_01 (address = D1h)
    19. 7.19 MFR_SPECIFIC_02 (address = D2h)
    20. 7.20 MFR_SPECIFIC_03 (address = D3h)
    21. 7.21 MFR_SPECIFIC_04 (address = D4h)
    22. 7.22 MFR_SPECIFIC_06 (address = D6h)
    23. 7.23 MFR_SPECIFIC_07 (address = D7h)
    24. 7.24 MFR_SPECIFIC_44 (address = FCh)
  9. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Applications
      1. 8.2.1 TPS549B22 1.5-V to 18-V Input, 1-V Output, 25-A Converter
      2. 8.2.2 Design Requirements
      3. 8.2.3 Detailed Design Procedure
        1. 8.2.3.1  Custom Design With WEBENCH® Tools
        2. 8.2.3.2  Switching Frequency Selection
        3. 8.2.3.3  Inductor Selection
        4. 8.2.3.4  Output Capacitor Selection
          1. 8.2.3.4.1 Minimum Output Capacitance to Make Sure of Stability
          2. 8.2.3.4.2 Response to a Load Transient
          3. 8.2.3.4.3 Output Voltage Ripple
        5. 8.2.3.5  Input Capacitor Selection
        6. 8.2.3.6  Bootstrap Capacitor Selection
        7. 8.2.3.7  BP Pin
        8. 8.2.3.8  R-C Snubber and VIN Pin High-Frequency Bypass
        9. 8.2.3.9  Optimize Reference Voltage (VSEL)
        10. 8.2.3.10 MODE Pin Selection
        11. 8.2.3.11 ADDR Pin Selection
        12. 8.2.3.12 Overcurrent Limit Design
      4. 8.2.4 Application Curves
    3. 8.3 Power Supply Recommendations
    4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
      2. 8.4.2 Layout Examples
      3. 8.4.3 Mounting and Thermal Profile Recommendation
  10. 9 Device and Documentation Support
    1. 9.1 Device Support
      1. 9.1.1 Development Support
        1. 9.1.1.1 Custom Design With WEBENCH® Tools
    2. 9.2 Documentation Support
      1. 9.2.1 Related Documentation
    3. 9.3 Receiving Notification of Documentation Updates
    4. 9.4 Support Resources
    5. 9.5 Trademarks
    6. 9.6 Electrostatic Discharge Caution
    7. 9.7 Glossary
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • RVF|40
Thermal pad, mechanical data (Package|Pins)
Orderable Information

6.5.3.6 Supported PMBUS Commands and Registers

Only the following PMBus commands are supported by TPS549B22, and not all parts of each command are supported.

Table 6-5 PMBUS Command and Register Table
CMD CODECOMMAND NAMEDESCRIPTIONNVM?TYPENo. of DATA BYTESBIT PATTERN
1hOPERATIONThe OPERATION command is used to turn the unit on and off in conjunction with the input from the EN pin. It is also used to cause the device to set the output voltage to the upper or lower margin voltages.noR/W Byte100XX XX00 = Turn Off
1000 XX00 = Turn on (VOUT Margin off)
1001 0100 = Turn on (VOUT Margin Low, Ignore Fault)
1001 1000 = Turn on (VOUT Margin Low, Act on Fault)
1010 0100 = Turn on (VOUT Margin High, Ignore Fault)
1010 1000 = Turn on (VOUT Margin High, Act on Fault)
2hON_OFF_CONFIGConfigures the combination of EN pin input and serial bus commands needed to turn the unit on and off. This includes how the unit responds when power is applied.yesR/W Byte10001 0011 = Act on neither OPERATION nor EN pin
0001 0111 = Act on EN pin and ignore OPERATION
0001 1011 = Act on OPERATION and ignore EN pin
0001 1111 = Act on OPERATION and Act on EN pin (requires both)
3hCLEAR_FAULTSClears all fault status registers to 0x00 and deasserts SMBAlert. The "Unit is Off" bit in the status byte and "PGOOD# de-assertion" bit in the status word are not cleared when this command is issued.noSend Byte0No data. Write only.
10hWRITE_PROTECTPrevents unwanted writes to the device. This register can be over-written. This is not a permanent lock.yesR/W Byte11000 0000 Only allow WRITE_PROTECT
0100 0000 Only allow WRITE_PROTECT and OPERATION
0010 0000 Only allow WRITE_PROTECT, OPERATION, ON_OFF_CONFIG and VOUT_COMMAND
0000 0000 Allow all writes
11hSTORE_DEFAULT_ALLCopies Operating Memory to matching non-volatile Default Store Memory.noSend Byte0No data. Write only.
12hRESTORE_DEFAULT_ALLRestores all parameters from non-volatile Default Store Memory to Operating MemorynoSend Byte0No data. Write only.
19hCAPABILITYThis command provides a way for a host system to determine some key capabilities of a PMBus device, including PEC, Alert and Speed.noRead Byte11101 0000 = PEC, 1-MHz bus speed, ALERT
20hVOUT_MODEHard coded to linear mode with exponent of –9.noRead Byte1000x xxxx = Linear format.
0001 0111 = Exponent value of –9 (1.953 mV resolution)
21hVOUT_COMMANDOutput voltage setpoint. DAC resolution is 1.9531 mV and range is ~0.6 V to ~1.200 VyesR/W Word20000 0001 0011 0011 = 0.5996 V
0000 0010 0110 0110 = 1.1992 V
25hVOUT_MARGIN_HIGHSets the voltage to which the output is to be changed when the OPERATION command is set to "MARGIN HIGH".noR/W Word20000 0001 0011 0011 = 0.5996 V
0000 0010 0110 0110 = 1.1992 V
26hVOUT_MARGIN_LOWSets the voltage to which the output is to be changed when the OPERATION command is set to "MARGIN LOW".noR/W Word20000 0001 0011 0011 = 0.5996 V
0000 0010 0110 0110 = 1.1992 V
78hSTATUS_BYTEStatus of all fault conditions in a data byte.noRead Byte1See Table 6-6
79hSTATUS_WORDStatus of all fault conditions in two data bytes.noRead Word2See Table 6-6
7AhSTATUS_VOUTReturns one byte of information relating to the status of the output voltage related faults.noRead Byte1See Table 6-8
7BhSTATUS_OUTReturns one byte of information relating to the status of the output current related faults.noRead Byte1See Table 6-8
7EhSTATUS_CMLStatus of communications, logic and memory in a data bytenoRead Byte1XXX0 0000
0XX0 0000 = A valid or supported command has been received
1XX0 0000 = An invalid or unsupported command has been received
X0X0 0000 = A valid or supported data has been received
X1X0 0000 = An invalid or unsupported data has been received
XX00 0000 = Packet error check has failed
XX10 0000 = Packet error check has succeeded
D0hMFR_SPECIFIC_00Customer programmable byte that does not affect chip functionalityyesR/W Byte1Free format
D1hMFR_SPECIFIC_01Program PGOOD delay and Power-On delayyesR/W Byte1
D2hMFR_SPECIFIC_02Read SST, CM, HICLOFF, TRK and SEQ. Program Forced SKIP Soft Start.yesR/W Byte1
D3hMFR_SPECIFIC_03Program Fsw and control mode, Read RC rampyesR/W Byte1
D4hMFR_SPECIFIC_04Program the D-CAP3 control mode offsetyesR/W Byte1
D6hMFR_SPECIFIC_06Program the VDD UVLO levelyesR/W Byte1
D7hMFR_SPECIFIC_07Program the final tracking set point and select pseudo/external trackingyesR/W Byte1
FChMFR_SPECIFIC_44Read TI PMBUS GUI Devcie ID and IC revision codenoRead Word2

GUID-38F92A43-C7E1-4CDC-8E31-2E82F78BAAE5-low.gifFigure 6-9 Start-up and VOUT_COMMAND Timing Diagram
Table 6-6 Status Word Summary Table
BITSNAMEMEANING
Low 7not usednot used
Low 6OFFUnit is not providing power to the output
Low 5VOUT_OV_FAULTOutput overvoltage
Low 4IOUT_OC_FAULTOutput overcurremt
Low 3VDD_UV_FAULTInput VDD undervoltage
Low 2TEMPInternal die temperature. Overtemperature fault
Low 1CMLCommunications, logic or memory fault
Low 0OTHERNone of the above in the PMBUS spec
High 7VOUTAny output voltage fault or warning
High 6IOUTAny output current fault or warning
High 5VDD_UV_FAULTInput VDD undervoltage
High 4not usedNot used
High 3PGOOD#Power good de-asserted
High 2not usednot used
High 1not usednot used
High 0not usednot used
Table 6-7 Status VOUT Summary Table
BITSNAMEMEANING
7OVFOvervoltage fault
6OVWOvervoltage warning
5UVWUndervoltage warning
4UVFUndervoltage fault
3not usednot used
2not usednot used
1not usednot used
Table 6-8 Status IOUT Summary Table
BITSNAMEMEANING
7OCFOvercurrent fault
6OCUVFOvercurrent and output undervoltage fault
5not usednot used
4UCFNegative overcurrent limit
3not usednot used
2not usednot used
1not usednot used
0not usednot used