SLUSDO2C June 2020 – February 2021 UCC21540-Q1
Tying DT to VCCI disables DT feature and allows the outputs to overlap. Placing a resistor (RDT) between DT and GND adjusts dead time according to the equation: DT (in ns) = 10 × RDT (in kΩ). TI recommends bypassing this pin with a ceramic capacitor, 2.2 nF or greater, close to DT pin to achieve better noise immunity. For more details on dead time, refer to Section 9.4.2.