JAJSBK7H January 2012 – February 2018 DS125DF410
Register 0x31, bits 6:5, and Register 0x33, bits 7:4 and 3:0, Register 0x34, bits 3:0, Register 0x35, bits 4:0, Register 0x3e, bit 7, and Register 0x6a
There are four adaptation modes available in the DS125DF410.
Bits 6:5 of register 0x31 determine the adaptation mode to be used. The mapping of these register bits to the adaptation algorithm is shown in Table 10.
|REGISTER 0x31, Bit 6
|REGISTER 0x31, Bit 5
|ADAPT MODE SETTING <1:0>||ADAPTATION ALGORITHM|
|0||1||01||Adapt CTLE Until Optimum (Default)|
|1||0||10||Adapt CTLE Until Optimum then DFE, then CTLE Again|
|1||1||11||Adapt CTLE Until Lock, then DFE, the CTLE Again|
By default the DS125DF410 requires that the equalized internal eye exhibit horizontal and vertical eye openings greater than a pre-set minimum in order to declare a successful lock. The minimum values are set in register 0x6a.
The DS125DF410 continuously monitors the horizontal and vertical eye openings while it is in lock. If the eye opening falls below the threshold set in register 0x6a, the DS125DF410 will declare a loss of lock.
The continuous monitoring of the horizontal and vertical eye openings may be disabled by clearing bit 7 of register 0x3e.